Texas Instruments AFE79 Series - 2.3.45 Register 54 h (offset = 54 h) [reset = 0 h]; 2.3.46 Register 55 h (offset = 55 h) [reset = 32 h]

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SBAU337–May 2020
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Serial Interface Register Maps
Table 2-88. Register 53 Field Descriptions (continued)
Bit Field Type Reset Description
0-0
TXC_B0_I_DATA_
NEGATION
R/W 0h
Determines whether the data is to be negated or not.
0 : Normal data (No negation)
1 : 2's complement (negation)
2.3.45 Register 54h (offset = 54h) [reset = 0h]
Figure 2-86. Register 54h
7 6 5 4 3 2 1 0
ADC_JESD_SYNC_N1_MUX_SEL ADC_JESD_SYNC_N0_MUX_SEL
R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-89. Register 54 Field Descriptions
Bit Field Type Reset Description
6-4
ADC_JESD_SYNC
_N1_MUX_SEL
R/W 0h
adc_jesd_sync_*_mux and adc_jesd_sync_*_reorder registers
together implement the sync reorder and broadcast
funcationlity.
This register is used for change the sync_n pin order.
Using LATTE to configure this register is recommended.
2-0
ADC_JESD_SYNC
_N0_MUX_SEL
R/W 0h
adc_jesd_sync_*_mux and adc_jesd_sync_*_reorder registers
together implement the sync reorder and broadcast
funcationlity.
This register is used for change the sync_n pin order.
Using LATTE to configure this register is recommended.
2.3.46 Register 55h (offset = 55h) [reset = 32h]
Figure 2-87. Register 55h
7 6 5 4 3 2 1 0
ADC_JESD_SYNC_N3_MUX_SEL ADC_JESD_SYNC_N2_MUX_SEL
R/W-3h R/W-2h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-90. Register 55 Field Descriptions
Bit Field Type Reset Description
6-4
ADC_JESD_SYNC
_N3_MUX_SEL
R/W 3h
adc_jesd_sync_*_mux and adc_jesd_sync_*_reorder registers
together implement the sync reorder and broadcast
funcationlity.
This register is used for change the sync_n pin order.
Using LATTE to configure this register is recommended.
2-0
ADC_JESD_SYNC
_N2_MUX_SEL
R/W 2h
adc_jesd_sync_*_mux and adc_jesd_sync_*_reorder registers
together implement the sync reorder and broadcast
funcationlity.
This register is used for change the sync_n pin order.
Using LATTE to configure this register is recommended.