SLEEP MODE CONTROL
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SBAU337–May 2020
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Macro
Table 1-81. (continued)
Macro ALC Coarse Index Pins Delay
1 0x00 1 RX Channel Select Bit 0: 1 → Value
specified in
subsequent
operands is valid for
1RX.
Bit 1: 1 → Value
specified in
subsequent
operands is valid for
2RX.
Bit 2: 1 → Value
specified in
subsequent
operands is valid for
3RX.
Bit 3: 1 → Value
specified in
subsequent
operands is valid for
4RX.
Bit 4 → RESERVED
Bit 5 → RESERVED
2 0x01 2 Coarse Index Pin
Delay
Memory Not used
Coarse Index Pin Delay: In the case where coarse index is sent over the ALC pins, this field gives the
amount of delay that needs to be applied on the gain data before being sent on the pins. The value
programmed here will correspond to number of cycles of interface rate clock.
This can be used by the customer to match the ALC pin information with latency of the data through the
JESD interface.
1.3 SLEEP MODE CONTROL
AFE79XX supports two sleep modes
1. Deep Sleep
i. In this mode the wakeup time is in the order of milliseconds.
ii. External Sysref is required after Deep Sleep is removed.
2. Light Sleep
i. In this mode the wakeup time is in the order of microseconds.
ii. No Sysref is required after light sleep is removed.
Additionally, it allows selective channels to be put into sleep.
1.3.1 Sleep Mode Configuration
This Macro specifies the Sleep Mode behaviour.
Table 1-82.
Macro Sleep Mode Configuration
Opcode 0x55
Operand Offset Length Value Functionality Results
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