Texas Instruments AFE79 Series - 2.12.59 Register 231 h (offset = 231 h) [reset = 0 h]; 2.12.60 Register 242 h (offset = 242 h) [reset = 0 h]; 2.12.61 Register 30 Ch (offset = 30 Ch) [reset = 1 h]

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SBAU337–May 2020
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Serial Interface Register Maps
2.12.59 Register 231h (offset = 231h) [reset = 0h]
Figure 2-1262. Register 231h
7 6 5 4 3 2 1 0
TX_DUC_BAN
D1_MIXER1_N
CO1_FCW_FO
RCE_RELOAD
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1274. Register 231 Field Descriptions
Bit Field Type Reset Description
0-0
TX_DUC_BAND1_
MIXER1_NCO1_F
CW_FORCE_REL
OAD
R/W 0h
A 0-1-0 sequence on this bit can be used to force a re-load of
the FCW in the Band1 nco1 in Mixer1. Will break phase
coherence.
2.12.60 Register 242h (offset = 242h) [reset = 0h]
Figure 2-1263. Register 242h
7 6 5 4 3 2 1 0
TX_DUC_BAN
D1_MIXER1_C
ONFIG2
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1275. Register 242 Field Descriptions
Bit Field Type Reset Description
0-0
TX_DUC_BAND1_
MIXER1_CONFIG2
R/W 0h
Enable fractional FCW mode in the Mixer 1 Band1 NCO
0 : Disabled
1 : Enabled
2.12.61 Register 30Ch (offset = 30Ch) [reset = 1h]
Figure 2-1264. Register 30Ch
7 6 5 4 3 2 1 0
TX_DUC_ISIN
C_NYQ_SEL
R/W-1h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1276. Register 30C Field Descriptions
Bit Field Type Reset Description
0-0
TX_DUC_ISINC_N
YQ_SEL
R/W 1h
Nyquist select (even/odd) for the Inverse SINC filter.
0: Nyquist 2
1: Nyquist 1