IO Wrap Register Map
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SBAU337–May 2020
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Serial Interface Register Maps
2.16.506 Register 915h (offset = 915h) [reset = 2h]
Figure 2-2769. Register 915h
7 6 5 4 3 2 1 0
OVR_SEL_INT
PI_TX_FB_LO
OP_3
OVR_INTPI_TX
_FB_LOOP_3
R/W-1h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2785. Register 915 Field Descriptions
Bit Field Type Reset Description
1-1
OVR_SEL_INTPI_
TX_FB_LOOP_3
R/W 1h
control to select whether the input function intpi_tx_fb_loop_3
needs to be overriden ot not. 1 indicates override.
0-0
OVR_INTPI_TX_F
B_LOOP_3
R/W 0h override value for ovr_sel_intpi_tx_fb_loop_3 is made high
2.16.507 Register 954h (offset = 954h) [reset = 0h]
Figure 2-2770. Register 954h
7 6 5 4 3 2 1 0
SEL_INTPI_RXA_AGC_PIN_FR
EEZE
POL_INTPI_RX
A_AGC_PIN_F
REEZE
R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2786. Register 954 Field Descriptions
Bit Field Type Reset Description
2-1
SEL_INTPI_RXA_
AGC_PIN_FREEZ
E
R/W 0h
select control for intpi_rxa_agc_pin_freeze. 0 indicates take
from parallel GPIO 1 indicates take from Serial LVDS GPIO 2
indicates take from Serdes GPIO
0-0
POL_INTPI_RXA_
AGC_PIN_FREEZ
E
R/W 0h
polarity control for intpi_rxa_agc_pin_freeze. 0 indicates pass
through from GPIO when selected 1 indicates inverted signal
2.16.508 Register 955h (offset = 955h) [reset = 2h]
Figure 2-2771. Register 955h
7 6 5 4 3 2 1 0
OVR_SEL_INT
PI_RXA_AGC_
PIN_FREEZE
OVR_INTPI_R
XA_AGC_PIN_
FREEZE
R/W-1h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2787. Register 955 Field Descriptions
Bit Field Type Reset Description
1-1
OVR_SEL_INTPI_
RXA_AGC_PIN_F
REEZE
R/W 1h
control to select whether the input function
intpi_rxa_agc_pin_freeze needs to be overriden ot not. 1
indicates override.
0-0
OVR_INTPI_RXA_
AGC_PIN_FREEZ
E
R/W 0h
override value for ovr_sel_intpi_rxa_agc_pin_freeze is made
high
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