Texas Instruments AFE79 Series - 2.3.129 Register D4 h (offset = D4 h) [reset = 0 h]

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SBAU337–May 2020
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Serial Interface Register Maps
Table 2-172. Register D3 Field Descriptions
Bit Field Type Reset Description
7-4
MUX_SEL_FOR_T
XD_B1_Q
R/W 7h
Selects the JESD stream that is to be routed to jesd
TXD_B1_Q
0 : sel 2T0_TXA_B0_Q
1 : sel 2T0_TXA_B1_Q
2 : sel 2T0_TXB_B0_Q
3 : sel 2T0_TXB_B1_Q
4 : sel 2T0_TXC_B0_Q
5 : sel 2T0_TXC_B1_Q
6 : sel 2T0_TXD_B0_Q
7 : sel 2T0_TXD_B1_Q
8 : sel 2T1_TXA_B0_Q
9 : sel 2T1_TXA_B1_Q
10 : sel 2T1_TXB_B0_Q
11 : sel 2T1_TXB_B1_Q
12 : sel 2T1_TXC_B0_Q
13 : sel 2T1_TXC_B1_Q
14 : sel 2T1_TXD_B0_Q
15 : sel 2T1_TXD_B1_Q
Refer to the configuration guide for mode details.
3-0
MUX_SEL_FOR_T
XD_B1_I
R/W 7h
Selects the JESD stream that is to be routed to jesd
TXD_B1_I
0 : sel 2T0_TXA_B0_I
1 : sel 2T0_TXA_B1_I
2 : sel 2T0_TXB_B0_I
3 : sel 2T0_TXB_B1_I
4 : sel 2T0_TXC_B0_I
5 : sel 2T0_TXC_B1_I
6 : sel 2T0_TXD_B0_I
7 : sel 2T0_TXD_B1_I
8 : sel 2T1_TXA_B0_I
9 : sel 2T1_TXA_B1_I
10 : sel 2T1_TXB_B0_I
11 : sel 2T1_TXB_B1_I
12 : sel 2T1_TXC_B0_I
13 : sel 2T1_TXC_B1_I
14 : sel 2T1_TXD_B0_I
15 : sel 2T1_TXD_B1_I
Refer to the configuration guide for mode details.
2.3.129 Register D4h (offset = D4h) [reset = 0h]
Figure 2-170. Register D4h
7 6 5 4 3 2 1 0
IQ_SWAP_TXD
_B1
IQ_SWAP_TXD
_B0
IQ_SWAP_TXC
_B1
IQ_SWAP_TXC
_B0
IQ_SWAP_TXB
_B1
IQ_SWAP_TXB
_B0
IQ_SWAP_TXA
_B1
IQ_SWAP_TXA
_B0
R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-173. Register D4 Field Descriptions
Bit Field Type Reset Description
7-7
IQ_SWAP_TXD_B
1
R/W 0h
When 1, swap iq data of TXD_B1
Used for IQ swap
0 : No swap
1 : swap
6-6
IQ_SWAP_TXD_B
0
R/W 0h
When 1, swap iq data of TXD_B0
Used for IQ swap
0 : No swap
1 : swap
5-5
IQ_SWAP_TXC_B
1
R/W 0h
When 1, swap iq data of TXC_B1
Used for IQ swap
0 : No swap
1 : swap