IO Wrap Register Map
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SBAU337–May 2020
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Serial Interface Register Maps
2.16.416 Register 81Dh (offset = 81Dh) [reset = 2h]
Figure 2-2679. Register 81Dh
7 6 5 4 3 2 1 0
OVR_SEL_INT
PI_RXAB_DSA
_GAIN_1
OVR_INTPI_R
XAB_DSA_GAI
N_1
R/W-1h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2695. Register 81D Field Descriptions
Bit Field Type Reset Description
1-1
OVR_SEL_INTPI_
RXAB_DSA_GAIN
_1
R/W 1h
control to select whether the input function
intpi_rxab_dsa_gain_1 needs to be overriden ot not. 1
indicates override.
0-0
OVR_INTPI_RXAB
_DSA_GAIN_1
R/W 0h
override value for ovr_sel_intpi_rxab_dsa_gain_1 is made
high
2.16.417 Register 820h (offset = 820h) [reset = 0h]
Figure 2-2680. Register 820h
7 6 5 4 3 2 1 0
SEL_INTPI_RXAB_DSA_GAIN_
2
POL_INTPI_RX
AB_DSA_GAIN
_2
R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2696. Register 820 Field Descriptions
Bit Field Type Reset Description
2-1
SEL_INTPI_RXAB
_DSA_GAIN_2
R/W 0h
select control for intpi_rxab_dsa_gain_2. 0 indicates take from
parallel GPIO 1 indicates take from Serial LVDS GPIO 2
indicates take from Serdes GPIO
0-0
POL_INTPI_RXAB
_DSA_GAIN_2
R/W 0h
polarity control for intpi_rxab_dsa_gain_2. 0 indicates pass
through from GPIO when selected 1 indicates inverted signal
2.16.418 Register 821h (offset = 821h) [reset = 2h]
Figure 2-2681. Register 821h
7 6 5 4 3 2 1 0
OVR_SEL_INT
PI_RXAB_DSA
_GAIN_2
OVR_INTPI_R
XAB_DSA_GAI
N_2
R/W-1h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2697. Register 821 Field Descriptions
Bit Field Type Reset Description
1-1
OVR_SEL_INTPI_
RXAB_DSA_GAIN
_2
R/W 1h
control to select whether the input function
intpi_rxab_dsa_gain_2 needs to be overriden ot not. 1
indicates override.
0-0
OVR_INTPI_RXAB
_DSA_GAIN_2
R/W 0h
override value for ovr_sel_intpi_rxab_dsa_gain_2 is made
high
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