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JESD_SUBCHIP Register Map
161
SBAU337–May 2020
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Serial Interface Register Maps
Table 2-44. JESD SubChip Register Map (continued)
ADDRESS (Hex) D7 D6 D5 D4 D3 D2 D1 D0
18Ah DBG_RX_READ_OUT_REG2[7:0]
18Bh DBG_RX_READ_OUT_REG2[15:8]
18Ch DBG_FB_READ_OUT_REG1[7:0]
18Dh DBG_FB_READ_OUT_REG1[15:8]
18Eh DBG_FB_READ_OUT_REG2[7:0]
18Fh DBG_FB_READ_OUT_REG2[15:8]
190h DBG_TX_READ_OUT_REG1[7:0]
191h DBG_TX_READ_OUT_REG1[15:8]
192h DBG_TX_READ_OUT_REG2[7:0]
193h DBG_TX_READ_OUT_REG2[15:8]
194h DBG_FB_ON_C DBG_FB_ON_A DBG_RX_ON_D DBG_RX_ON_C DBG_RX_ON_B DBG_RX_ON_A
195h DBG_TX_ON_D DBG_TX_ON_C DBG_TX_ON_B DBG_TX_ON_A
19Ch SPARE_OUT_REG0
19Dh SPARE_OUT_REG1
19Eh SPARE_OUT_REG2
19Fh SPARE_OUT_REG3
1A0h SPARE_OUT_REG4
1A1h SPARE_OUT_REG5
1A2h SPARE_OUT_REG6
1A3h SPARE_OUT_REG7
1A4h SPARE_IN[7:0]
1A5h SPARE_IN[15:8]
1A6h SPARE_IN[23:16]
1A7h SPARE_IN[31:24]
2.3.1 Register 20h (offset = 20h) [reset = 12h]
Figure 2-42. Register 20h
7 6 5 4 3 2 1 0
SERDESAB_A
DDR_BIT13_FL
IP
SERDESAB_APB_MODE_16B SERDESAB_APB_PIN_INTF_EN SERDESAB_APB_PAGE_ADDR
_INDEX
R/W-0h R/W-1h R/W-0h R/W-2h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-45. Register 20 Field Descriptions
Bit Field Type Reset Description
6-6
SERDESAB_ADD
R_BIT13_FLIP
R/W 0h
Set this bit to flip the addr[13] of addr[15:0] of SerdesAB APB
bus
0 : flip
1 : no-flip
5-4
SERDESAB_APB_
MODE_16B
R/W 1h
Interface mode for SerdesAB
0 : 8b APB Intf
1 : 16b APB Intf
2 : 32b APB Intf
3-2
SERDESAB_APB_
PIN_INTF_EN
R/W 0h
set this bit to access SerdesAB APB interface through
different modes
0 : SPI2APB
1 : GPIO
2 : CM4 AHB
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