IO Wrap Register Map
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SBAU337–May 2020
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Serial Interface Register Maps
2.16.494 Register 8C9h (offset = 8C9h) [reset = 2h]
Figure 2-2757. Register 8C9h
7 6 5 4 3 2 1 0
OVR_SEL_INT
PI_TDD_EN_F
BAB
OVR_INTPI_T
DD_EN_FBAB
R/W-1h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2773. Register 8C9 Field Descriptions
Bit Field Type Reset Description
1-1
OVR_SEL_INTPI_
TDD_EN_FBAB
R/W 1h
control to select whether the input function intpi_tdd_en_fbab
needs to be overriden ot not. 1 indicates override.
0-0
OVR_INTPI_TDD_
EN_FBAB
R/W 0h override value for ovr_sel_intpi_tdd_en_fbab is made high
2.16.495 Register 8CCh (offset = 8CCh) [reset = 0h]
Figure 2-2758. Register 8CCh
7 6 5 4 3 2 1 0
SEL_INTPI_TDD_EN_FBCD POL_INTPI_TD
D_EN_FBCD
R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2774. Register 8CC Field Descriptions
Bit Field Type Reset Description
2-1
SEL_INTPI_TDD_
EN_FBCD
R/W 0h
select control for intpi_tdd_en_fbcd. 0 indicates take from
parallel GPIO 1 indicates take from Serial LVDS GPIO 2
indicates take from Serdes GPIO
0-0
POL_INTPI_TDD_
EN_FBCD
R/W 0h
polarity control for intpi_tdd_en_fbcd. 0 indicates pass through
from GPIO when selected 1 indicates inverted signal
2.16.496 Register 8CDh (offset = 8CDh) [reset = 2h]
Figure 2-2759. Register 8CDh
7 6 5 4 3 2 1 0
OVR_SEL_INT
PI_TDD_EN_F
BCD
OVR_INTPI_T
DD_EN_FBCD
R/W-1h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2775. Register 8CD Field Descriptions
Bit Field Type Reset Description
1-1
OVR_SEL_INTPI_
TDD_EN_FBCD
R/W 1h
control to select whether the input function intpi_tdd_en_fbcd
needs to be overriden ot not. 1 indicates override.
0-0
OVR_INTPI_TDD_
EN_FBCD
R/W 0h override value for ovr_sel_intpi_tdd_en_fbcd is made high
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