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SERDES Register Map
493
SBAU337–May 2020
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Serial Interface Register Maps
Table 2-804. Register 4144 Field Descriptions
Bit Field Type Reset Description
7-0
TX_TEST_PATTE
RN_LOW[7:0]
R/W AAh Lower word of the 32-bit TX test pattern memory.
2.6.85 Register 4145h (offset = 4145h) [reset = AAh]
Figure 2-799. Register 4145h
7 6 5 4 3 2 1 0
TX_TEST_PATTERN_LOW[15:8]
R/W-AAh
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-805. Register 4145 Field Descriptions
Bit Field Type Reset Description
7-0
TX_TEST_PATTE
RN_LOW[15:8]
R/W AAh Lower word of the 32-bit TX test pattern memory.
2.6.86 Register 41E8h (offset = 41E8h) [reset = 0h]
Figure 2-800. Register 41E8h
7 6 5 4 3 2 1 0
VTSTGRPU_TX[2:0] ENTSTPGROU
P_TX
TESTMODE_TX
R/W-0h R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-806. Register 41E8 Field Descriptions
Bit Field Type Reset Description
7-5
VTSTGRPU_TX[2:
0]
R/W 0h
4-4
ENTSTPGROUP_T
X
R/W 0h
3-1 TESTMODE_TX R/W 0h
2.6.87 Register 41E9h (offset = 41E9h) [reset = 0h]
Figure 2-801. Register 41E9h
7 6 5 4 3 2 1 0
VTSTGRPU_T
X[3]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-807. Register 41E9 Field Descriptions
Bit Field Type Reset Description
0-0 VTSTGRPU_TX[3] R/W 0h