Texas Instruments AFE79 Series User Manual

DAC JESD Register Map www.ti.com
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SBAU337–May 2020
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Serial Interface Register Maps
2.4.26 Register 39h (offset = 39h) [reset = 0h]
Figure 2-255. Register 39h
7 6 5 4 3 2 1 0
CLK_DIV_LFSR_SEED_VAL[7:0]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-259. Register 39 Field Descriptions
Bit Field Type Reset Description
7-0
CLK_DIV_LFSR_S
EED_VAL[7:0]
R/W 0h
LFSR load value to load lfsr_seed_val into the LFSR module.
To be used along with clk_div_lfsr_seed_ovr.
2.4.27 Register 3Ah (offset = 3Ah) [reset = 0h]
Figure 2-256. Register 3Ah
7 6 5 4 3 2 1 0
CLK_DIV_LFSR_SEED_VAL[15:8]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-260. Register 3A Field Descriptions
Bit Field Type Reset Description
7-0
CLK_DIV_LFSR_S
EED_VAL[15:8]
R/W 0h
LFSR load value to load lfsr_seed_val into the LFSR module.
To be used along with clk_div_lfsr_seed_ovr.
2.4.28 Register 3Bh (offset = 3Bh) [reset = 2h]
Figure 2-257. Register 3Bh
7 6 5 4 3 2 1 0
CLK_DIV_LFSR_SEED_VAL[23:16]
R/W-2h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-261. Register 3B Field Descriptions
Bit Field Type Reset Description
7-0
CLK_DIV_LFSR_S
EED_VAL[23:16]
R/W 2h
LFSR load value to load lfsr_seed_val into the LFSR module.
To be used along with clk_div_lfsr_seed_ovr.
2.4.29 Register 3Ch (offset = 3Ch) [reset = 88h]
Figure 2-258. Register 3Ch
7 6 5 4 3 2 1 0
SERDES_FIFO_OFFSET_LANE1 SERDES_FIFO_OFFSET_LANE0
R/W-8h R/W-8h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset

Texas Instruments AFE79 Series Specifications

General

Brand	Texas Instruments
Model	AFE79 Series
Category	Control Unit
Language	English