JESD_SUBCHIP Register Map
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SBAU337–May 2020
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Serial Interface Register Maps
2.3.103 Register B1h (offset = B1h) [reset = 0h]
Figure 2-144. Register B1h
7 6 5 4 3 2 1 0
IQ_SWAP_FBC
D_P23
IQ_SWAP_FBC
D_P01
IQ_SWAP_FBA
B_P23
IQ_SWAP_FBA
B_P01
R/W-0h R/W-0h R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-147. Register B1 Field Descriptions
Bit Field Type Reset Description
3-3
IQ_SWAP_FBCD_
P23
R/W 0h
When 1, swap data on pins p2 and p3
Used for IQ swap
0 : No swap
1 : swap
2-2
IQ_SWAP_FBCD_
P01
R/W 0h
When 1, swap data on pins p0 and p1
Used for IQ swap
0 : No swap
1 : swap
1-1
IQ_SWAP_FBAB_
P23
R/W 0h
When 1, swap data on pins p2 and p3
Used for IQ swap
0 : No swap
1 : swap
0-0
IQ_SWAP_FBAB_
P01
R/W 0h
When 1, swap data on pins p0 and p1
Used for IQ swap
0 : No swap
1 : swap
2.3.104 Register B4h (offset = B4h) [reset = 11h]
Figure 2-145. Register B4h
7 6 5 4 3 2 1 0
TDD_FB_ON_
C_2R1F_AB_M
ASK
TDD_FB_ON_
A_2R1F_AB_M
ASK
TDD_RX_ON_
D_2R1F_AB_M
ASK
TDD_RX_ON_
C_2R1F_AB_M
ASK
TDD_RX_ON_
B_2R1F_AB_M
ASK
TDD_RX_ON_
A_2R1F_AB_M
ASK
R/W-0h R/W-1h R/W-0h R/W-0h R/W-0h R/W-1h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-148. Register B4 Field Descriptions
Bit Field Type Reset Description
5-5
TDD_FB_ON_C_2
R1F_AB_MASK
R/W 0h
Used to derive TDD switching signal the decides RX/FB data
going on the lanes, for 2R1F_AB instance
If the fb data has fbcd information then set the register to 1
0 : mask
1 : fb_on_c
4-4
TDD_FB_ON_A_2
R1F_AB_MASK
R/W 1h
Used to derive TDD switching signal the decides RX/FB data
going on the lanes, for 2R1F_AB instance
If the fb data has fbab information then set the register to 1
0 : mask
1 : fb_on_a
3-3
TDD_RX_ON_D_2
R1F_AB_MASK
R/W 0h
Used to derive TDD switching signal the decides RX/FB data
going on the lanes, for 2R1F_AB instance
If the rx data has rxd information then set the register to 1
0 : mask
1 : rx_on_d
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