Texas Instruments AFE79 Series - 2.16.601 Register 10 A5 h (offset = 10 A5 h) [reset = 2 h]; 2.16.602 Register 10 A8 h (offset = 10 A8 h) [reset = 0 h]; 2.16.603 Register 10 A9 h (offset = 10 A9 h) [reset = 2 h]

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SBAU337–May 2020
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Serial Interface Register Maps
2.16.601 Register 10A5h (offset = 10A5h) [reset = 2h]
Figure 2-2864. Register 10A5h
7 6 5 4 3 2 1 0
OVR_SEL_INT
PO_RXD_PKD
ET_2
OVR_INTPO_R
XD_PKDET_2
R/W-1h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2880. Register 10A5 Field Descriptions
Bit Field Type Reset Description
1-1
OVR_SEL_INTPO_
RXD_PKDET_2
R/W 1h
control to select whether the input function intpo_rxd_pkdet_2
needs to be overriden ot not. 1 indicates override.
0-0
OVR_INTPO_RXD
_PKDET_2
R/W 0h
override value for intpo_rxd_pkdet_2 when
ovr_sel_intpo_rxd_pkdet_2 is made high
2.16.602 Register 10A8h (offset = 10A8h) [reset = 0h]
Figure 2-2865. Register 10A8h
7 6 5 4 3 2 1 0
POL_INTPO_R
XD_PKDET_3
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2881. Register 10A8 Field Descriptions
Bit Field Type Reset Description
0-0
POL_INTPO_RXD
_PKDET_3
R/W 0h
polarity control for intpo_rxd_pkdet_3. 0 indicates pass
through from GPIO when selected 1 indicates inverted signal
2.16.603 Register 10A9h (offset = 10A9h) [reset = 2h]
Figure 2-2866. Register 10A9h
7 6 5 4 3 2 1 0
OVR_SEL_INT
PO_RXD_PKD
ET_3
OVR_INTPO_R
XD_PKDET_3
R/W-1h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2882. Register 10A9 Field Descriptions
Bit Field Type Reset Description
1-1
OVR_SEL_INTPO_
RXD_PKDET_3
R/W 1h
control to select whether the input function intpo_rxd_pkdet_3
needs to be overriden ot not. 1 indicates override.
0-0
OVR_INTPO_RXD
_PKDET_3
R/W 0h
override value for intpo_rxd_pkdet_3 when
ovr_sel_intpo_rxd_pkdet_3 is made high