www.ti.com
Timing Controller Register Map
975
SBAU337–May 2020
Submit Documentation Feedback
Copyright © 2020, Texas Instruments Incorporated
Serial Interface Register Maps
2.15.50 Register C1h (offset = C1h) [reset = 0h]
Figure 2-2257. Register C1h
7 6 5 4 3 2 1 0
SINGLEFB_CH
A_CHC
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2272. Register C1 Field Descriptions
Bit Field Type Reset Description
0-0
SINGLEFB_CHA_
CHC
R/W 0h
If it is single fb mode chose whether cha or chc fb is to be
chosen. chA-0, chC-1
2.15.51 Register C2h (offset = C2h) [reset = 0h]
Figure 2-2258. Register C2h
7 6 5 4 3 2 1 0
CH0_LSB_FBMUXSEL
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2273. Register C2 Field Descriptions
Bit Field Type Reset Description
1-0
CH0_LSB_FBMUX
SEL
R/W 0h ch0 used for the fbab in case of dual fbmode.
2.15.52 Register C3h (offset = C3h) [reset = 1h]
Figure 2-2259. Register C3h
7 6 5 4 3 2 1 0
CH1_LSB_FBMUXSEL
R/W-1h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2274. Register C3 Field Descriptions
Bit Field Type Reset Description
1-0
CH1_LSB_FBMUX
SEL
R/W 1h ch1 used for the fbab in case of dual fbmode.
2.15.53 Register C4h (offset = C4h) [reset = 2h]
Figure 2-2260. Register C4h
7 6 5 4 3 2 1 0
CH0_MSB_FBMUXSEL
R/W-2h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset