TX Top Register Map
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SBAU337–May 2020
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Serial Interface Register Maps
2.12.189 Register 58Ch (offset = 58Ch) [reset = 4h]
Figure 2-1392. Register 58Ch
7 6 5 4 3 2 1 0
TX_IP_PAP_H
PF_UPDATE_S
AMPLES
TX_IP_PAP_H
PF_MODE_NO
_AVG
TX_IP_PAP_M
A_UPDATE_S
AMPLES
TX_IP_PAP_M
A_MODE_NO_
AVG
R/W-0h R/W-1h R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1404. Register 58C Field Descriptions
Bit Field Type Reset Description
3-3
TX_IP_PAP_HPF_
UPDATE_SAMPLE
S
R/W 0h
In input PAP high pass filter mode, averaging samples update
pulse. A 0->1->0 transition will update the sample config.
2-2
TX_IP_PAP_HPF_
MODE_NO_AVG
R/W 1h
In input PAP high pass filter detection mode, control for
enable and disable of averaging mode.
0 : Don’t use FIFOs
1 : Use FIFO storage
1-1
TX_IP_PAP_MA_U
PDATE_SAMPLES
R/W 0h
Input PAP moving average mode, averaging samples update
pulse. A 0->1->0 transition will update the sample config.
0-0
TX_IP_PAP_MA_M
ODE_NO_AVG
R/W 0h
In TX-JESD interface (or input (IP)) PAP moving average
detection mode, control for enable and disable of averaging
mode.
0: Enable averaging
1: Disable averaging
2.12.190 Register 590h (offset = 590h) [reset = 0h]
Figure 2-1393. Register 590h
7 6 5 4 3 2 1 0
TX_IP_PAP_DET_ALARM_STATUS
R-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1405. Register 590 Field Descriptions
Bit Field Type Reset Description
2-0
TX_IP_PAP_DET_
ALARM_STATUS
R 0h
Input PAP detection alarm Masked status. Value 1 = trigger, 0
= notrigger.
bit [0] = Moving average mode
bit [1] = High pass filter mode
bit [2] = Reserved
2.12.191 Register 591h (offset = 591h) [reset = 0h]
Figure 2-1394. Register 591h
7 6 5 4 3 2 1 0
TX_IP_PAP_DET_UNMASK_STATUS
R-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset