Texas Instruments AFE79 Series - 2.4.99 Register 82 h (offset = 82 h) [reset = 11 h]; 2.4.100 Register 83 h (offset = 83 h) [reset = 11 h]; 2.4.101 Register 84 h (offset = 84 h) [reset = 1 h]

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Serial Interface Register Maps
2.4.99 Register 82h (offset = 82h) [reset = 11h]
Figure 2-328. Register 82h
7 6 5 4 3 2 1 0
CODE_SYNC_ERR_CNT_THRESH RBD_BUF_MISMATCH_ERR_CNT_THRESH
R/W-1h R/W-1h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-332. Register 82 Field Descriptions
Bit Field Type Reset Description
7-4
CODE_SYNC_ER
R_CNT_THRESH
R/W 1h
JESDB:error count threshold for code synchronization error
after which it will pull the syncz signal and reset the links.
JESDC:error count threshold for extended multiblock
alignment after which it will pull the syncz signal and reset the
links.
3-0
RBD_BUF_MISMA
TCH_ERR_CNT_T
HRESH
R/W 1h
JESDB:error count threshold for elastic buffer end char
mismatch error after which it will pull the syncz signal and
reset the links.
JESDC : UNUSED
2.4.100 Register 83h (offset = 83h) [reset = 11h]
Figure 2-329. Register 83h
7 6 5 4 3 2 1 0
DEC_8B10B_DISP_ERR_CNT_THRESH DEC_8B10B_CODE_ERR_CNT_THRESH
R/W-1h R/W-1h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-333. Register 83 Field Descriptions
Bit Field Type Reset Description
7-4
DEC_8B10B_DISP
_ERR_CNT_THRE
SH
R/W 1h
JESDB:error count threshold for 8b/10b disparity error after
which it will pull the syncz signal and reset the links.
JESDC:error count threshold for CRC error after which it will
pull the syncz signal and reset the links.
3-0
DEC_8B10B_COD
E_ERR_CNT_THR
ESH
R/W 1h
JESDB:error count threshold for 8b/10b not-in-table code error
after which it will pull the syncz signal and reset the links.
JESDC:error count threshold for sync-header invalid error
after which it will pull the syncz signal and reset the links.
2.4.101 Register 84h (offset = 84h) [reset = 1h]
Figure 2-330. Register 84h
7 6 5 4 3 2 1 0
LANE0_SYNC_ERR_CNT
R-1h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-334. Register 84 Field Descriptions
Bit Field Type Reset Description
7-0
LANE0_SYNC_ER
R_CNT
R 1h lane0/4 sync error count value read