Texas Instruments AFE79 Series - 2.5.77 Register 7 Eh (offset = 7 Eh) [reset = 0 h]; 2.5.78 Register 7 Fh (offset = 7 Fh) [reset = 0 h]; 2.5.79 Register 80 h (offset = 80 h) [reset = 0 h]

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SBAU337–May 2020
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Serial Interface Register Maps
Table 2-577. Register 7D Field Descriptions
Bit Field Type Reset Description
7-5 LINK0_JESDV R/W 1h JESD link config for STX1/5
4-0 LINK0_ILA_S_M1 R/W 0h
JESD link config for STX1/5
Used only when link0_jesd_ila_config_override is 1.
Else S derived from LMFS is used.
2.5.77 Register 7Eh (offset = 7Eh) [reset = 0h]
Figure 2-573. Register 7Eh
7 6 5 4 3 2 1 0
LINK0_ILA_HD 0 0 LINK0_CF
R/W-0h R/W-0h R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-578. Register 7E Field Descriptions
Bit Field Type Reset Description
7-7 LINK0_ILA_HD R/W 0h
JESD link config for STX1/5
Used only when link0_jesd_ila_config_override is 1.
Else Hd derived from LMFS is used.
6-5 0 R/W 0h Must read or write 0
4-0 LINK0_CF R/W 0h JESD link config for STX1/5
2.5.78 Register 7Fh (offset = 7Fh) [reset = 0h]
Figure 2-574. Register 7Fh
7 6 5 4 3 2 1 0
LINK0_RES1
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-579. Register 7F Field Descriptions
Bit Field Type Reset Description
7-0 LINK0_RES1 R/W 0h JESD link config for STX1/5
2.5.79 Register 80h (offset = 80h) [reset = 0h]
Figure 2-575. Register 80h
7 6 5 4 3 2 1 0
LINK0_RES2
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-580. Register 80 Field Descriptions
Bit Field Type Reset Description
7-0 LINK0_RES2 R/W 0h JESD link config for STX1/5