www.ti.com
IO Wrap Register Map
1203
SBAU337–May 2020
Submit Documentation Feedback
Copyright © 2020, Texas Instruments Incorporated
Serial Interface Register Maps
2.16.616 Register 11A4h (offset = 11A4h) [reset = 0h]
Figure 2-2879. Register 11A4h
7 6 5 4 3 2 1 0
POL_INTPO_F
BAB_PKDET_0
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2895. Register 11A4 Field Descriptions
Bit Field Type Reset Description
0-0
POL_INTPO_FBAB
_PKDET_0
R/W 0h
polarity control for intpo_fbab_pkdet_0. 0 indicates pass
through from GPIO when selected 1 indicates inverted signal
2.16.617 Register 11A5h (offset = 11A5h) [reset = 2h]
Figure 2-2880. Register 11A5h
7 6 5 4 3 2 1 0
OVR_SEL_INT
PO_FBAB_PK
DET_0
OVR_INTPO_F
BAB_PKDET_0
R/W-1h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2896. Register 11A5 Field Descriptions
Bit Field Type Reset Description
1-1
OVR_SEL_INTPO_
FBAB_PKDET_0
R/W 1h
control to select whether the input function
intpo_fbab_pkdet_0 needs to be overriden ot not. 1 indicates
override.
0-0
OVR_INTPO_FBA
B_PKDET_0
R/W 0h
override value for intpo_fbab_pkdet_0 when
ovr_sel_intpo_fbab_pkdet_0 is made high
2.16.618 Register 11A8h (offset = 11A8h) [reset = 0h]
Figure 2-2881. Register 11A8h
7 6 5 4 3 2 1 0
POL_INTPO_F
BAB_PKDET_1
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2897. Register 11A8 Field Descriptions
Bit Field Type Reset Description
0-0
POL_INTPO_FBAB
_PKDET_1
R/W 0h
polarity control for intpo_fbab_pkdet_1. 0 indicates pass
through from GPIO when selected 1 indicates inverted signal