www.ti.com
RX Top Register Map
723
SBAU337–May 2020
Submit Documentation Feedback
Copyright © 2020, Texas Instruments Incorporated
Serial Interface Register Maps
2.13.40 Register 1A0h (offset = 1A0h) [reset = 0h]
Figure 2-1452. Register 1A0h
7 6 5 4 3 2 1 0
RX_DDC_BAND1_NCO0_FCW[7:0]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1465. Register 1A0 Field Descriptions
Bit Field Type Reset Description
7-0
RX_DDC_BAND1_
NCO0_FCW[7:0]
R/W 0h
Frequency control word (FCW) for nco0 of band1.
The System Configuration Macros automatically configure this.
2.13.41 Register 1A1h (offset = 1A1h) [reset = 0h]
Figure 2-1453. Register 1A1h
7 6 5 4 3 2 1 0
RX_DDC_BAND1_NCO0_FCW[15:8]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1466. Register 1A1 Field Descriptions
Bit Field Type Reset Description
7-0
RX_DDC_BAND1_
NCO0_FCW[15:8]
R/W 0h
Frequency control word (FCW) for nco0 of band1.
The System Configuration Macros automatically configure this.
2.13.42 Register 1A2h (offset = 1A2h) [reset = 0h]
Figure 2-1454. Register 1A2h
7 6 5 4 3 2 1 0
RX_DDC_BAND1_NCO0_FCW[23:16]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1467. Register 1A2 Field Descriptions
Bit Field Type Reset Description
7-0
RX_DDC_BAND1_
NCO0_FCW[23:16]
R/W 0h
Frequency control word (FCW) for nco0 of band1.
The System Configuration Macros automatically configure this.
2.13.43 Register 1A3h (offset = 1A3h) [reset = 0h]
Figure 2-1455. Register 1A3h
7 6 5 4 3 2 1 0
RX_DDC_BAND1_NCO0_FCW[31:24]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset