Texas Instruments AFE79 Series - 2.13.51 Register 1 E3 h (offset = 1 E3 h) [reset = 0 h]; 2.13.52 Register 200 h (offset = 200 h) [reset = 0 h]; 2.13.53 Register 201 h (offset = 201 h) [reset = 0 h]

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SBAU337–May 2020
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Serial Interface Register Maps
Table 2-1475. Register 1E2 Field Descriptions
Bit Field Type Reset Description
7-0
RX_DDC_BAND1_
NCO1_PHASE_OF
FSET[7:0]
R/W 0h Offset phase for nco1 of band1
2.13.51 Register 1E3h (offset = 1E3h) [reset = 0h]
Figure 2-1463. Register 1E3h
7 6 5 4 3 2 1 0
RX_DDC_BAND1_NCO1_PHASE_OFFSET[15:8]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1476. Register 1E3 Field Descriptions
Bit Field Type Reset Description
7-0
RX_DDC_BAND1_
NCO1_PHASE_OF
FSET[15:8]
R/W 0h Offset phase for nco1 of band1
2.13.52 Register 200h (offset = 200h) [reset = 0h]
Figure 2-1464. Register 200h
7 6 5 4 3 2 1 0
RX_DDC_BAND1_NCO0_FMULT[7:0]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1477. Register 200 Field Descriptions
Bit Field Type Reset Description
7-0
RX_DDC_BAND1_
NCO0_FMULT[7:0]
R/W 0h
Frequency shift corresponding to the fcw of nco0 of band1,
expressed in kHz, less the closest multiple of Fadc/16. Value
programmed here should correspond to the nco0 fcw of
band1, and should be a value between [-Fadc/32 and
+Fadc/32].
The System Configuration Macros automatically compute and
configure this, and are hence strongly recommended.
2.13.53 Register 201h (offset = 201h) [reset = 0h]
Figure 2-1465. Register 201h
7 6 5 4 3 2 1 0
RX_DDC_BAND1_NCO0_FMULT[15:8]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset