Texas Instruments AFE79 Series - 2.5.196 Register 116 h (offset = 116 h) [reset = 0 h]; 2.5.197 Register 117 h (offset = 117 h) [reset = 0 h]; 2.5.198 Register 118 h (offset = 118 h) [reset = 0 h]

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SBAU337–May 2020
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Serial Interface Register Maps
Table 2-696. Register 115 Field Descriptions
Bit Field Type Reset Description
7-0
JESD_SHORT_TE
ST_PATTERN_INP
UT4[15:8]
R/W 0h
Used when jesd_short_test_pattern_override or
fb_jesd_short_test_pattern_override are set
ADC sample4
2.5.196 Register 116h (offset = 116h) [reset = 0h]
Figure 2-692. Register 116h
7 6 5 4 3 2 1 0
JESD_SHORT_TEST_PATTERN_INPUT5[7:0]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-697. Register 116 Field Descriptions
Bit Field Type Reset Description
7-0
JESD_SHORT_TE
ST_PATTERN_INP
UT5[7:0]
R/W 0h
Used when jesd_short_test_pattern_override or
fb_jesd_short_test_pattern_override are set
ADC sample5
2.5.197 Register 117h (offset = 117h) [reset = 0h]
Figure 2-693. Register 117h
7 6 5 4 3 2 1 0
JESD_SHORT_TEST_PATTERN_INPUT5[15:8]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-698. Register 117 Field Descriptions
Bit Field Type Reset Description
7-0
JESD_SHORT_TE
ST_PATTERN_INP
UT5[15:8]
R/W 0h
Used when jesd_short_test_pattern_override or
fb_jesd_short_test_pattern_override are set
ADC sample5
2.5.198 Register 118h (offset = 118h) [reset = 0h]
Figure 2-694. Register 118h
7 6 5 4 3 2 1 0
JESD_SHORT_TEST_PATTERN_INPUT6[7:0]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-699. Register 118 Field Descriptions
Bit Field Type Reset Description
7-0
JESD_SHORT_TE
ST_PATTERN_INP
UT6[7:0]
R/W 0h
Used when jesd_short_test_pattern_override or
fb_jesd_short_test_pattern_override are set
ADC sample6