Texas Instruments AFE79 Series - 2.13.190 Register 4 D2 h (offset = 4 D2 h) [reset = 0 h]; 2.13.191 Register 4 D3 h (offset = 4 D3 h) [reset = 0 h]; 2.13.192 Register 4 D4 h (offset = 4 D4 h) [reset = 0 h]

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Serial Interface Register Maps
Table 2-1614. Register 4D1 Field Descriptions
Bit Field Type Reset Description
2-0
RX_AGC_BAND0_
LNA_GAIN10[10:8]
R/W 0h
LNA Gain for Band0 for temp index 10 in case of External
LNA Control , Gain for DVGA Index 10 in case of External
DVGA control
2.13.190 Register 4D2h (offset = 4D2h) [reset = 0h]
Figure 2-1602. Register 4D2h
7 6 5 4 3 2 1 0
RX_AGC_BAND0_LNA_GAIN11[7:0]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1615. Register 4D2 Field Descriptions
Bit Field Type Reset Description
7-0
RX_AGC_BAND0_
LNA_GAIN11[7:0]
R/W 0h
LNA Gain for Band0 for temp index 11 in case of External
LNA Control , Gain for DVGA Index 11 in case of External
DVGA control
2.13.191 Register 4D3h (offset = 4D3h) [reset = 0h]
Figure 2-1603. Register 4D3h
7 6 5 4 3 2 1 0
RX_AGC_BAND0_LNA_GAIN11[10:8]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1616. Register 4D3 Field Descriptions
Bit Field Type Reset Description
2-0
RX_AGC_BAND0_
LNA_GAIN11[10:8]
R/W 0h
LNA Gain for Band0 for temp index 11 in case of External
LNA Control , Gain for DVGA Index 11 in case of External
DVGA control
2.13.192 Register 4D4h (offset = 4D4h) [reset = 0h]
Figure 2-1604. Register 4D4h
7 6 5 4 3 2 1 0
RX_AGC_BAND0_LNA_GAIN12[7:0]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1617. Register 4D4 Field Descriptions
Bit Field Type Reset Description
7-0
RX_AGC_BAND0_
LNA_GAIN12[7:0]
R/W 0h
LNA Gain for Band0 for temp index 12 in case of External
LNA Control , Gain for DVGA Index 12 in case of External
DVGA control