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873
SBAU337–May 2020
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Serial Interface Register Maps
2.14.44 Register 10Dh (offset = 10Dh) [reset = 0h]
Figure 2-1927. Register 10Dh
7 6 5 4 3 2 1 0
FB_DDC_NCO3_FMULT[15:8]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1941. Register 10D Field Descriptions
Bit Field Type Reset Description
7-0
FB_DDC_NCO3_F
MULT[15:8]
R/W 0h
Frequency shift corresponding to the fcw of nco3, expressed
in kHz, modulo Fadc/16. Value programmed here should
correspond to the nco0 fcw, and should be a value between [0
and Fadc/16].
The System Configuration Macros automatically compute and
configure this, and are hence strongly recommended.
2.14.45 Register 10Eh (offset = 10Eh) [reset = 0h]
Figure 2-1928. Register 10Eh
7 6 5 4 3 2 1 0
FB_DDC_NCO3_FMULT[21:16]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1942. Register 10E Field Descriptions
Bit Field Type Reset Description
5-0
FB_DDC_NCO3_F
MULT[21:16]
R/W 0h
Frequency shift corresponding to the fcw of nco3, expressed
in kHz, modulo Fadc/16. Value programmed here should
correspond to the nco0 fcw, and should be a value between [0
and Fadc/16].
The System Configuration Macros automatically compute and
configure this, and are hence strongly recommended.
2.14.46 Register 140h (offset = 140h) [reset = 0h]
Figure 2-1929. Register 140h
7 6 5 4 3 2 1 0
FB_DDC_NCO0_FRAC_FCW_NUM[7:0]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1943. Register 140 Field Descriptions
Bit Field Type Reset Description
7-0
FB_DDC_NCO0_F
RAC_FCW_NUM[7
:0]
R/W 0h
Numerator of the fractional fequency control word for nco0.
Signed number.
System Configuration macros compute and configure this
automatically and hence are strongly recommended.