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SBAU337–May 2020
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Serial Interface Register Maps
Table 2-2195. Register 635 Field Descriptions
Bit Field Type Reset Description
2-0 FB_ALC_MODE R/W 3h
0:IEEE Floating Point Mode after gain distribution:
1:reserved:
2:Coarse/Fine Gain Mode. Coarse Gain Indicated in every
output sample. replicated on both I & Q
3:Coarse/Fine Gain Mode. Coarse Gain distributed in (I,Q)
sample together:
4:Coarse/Fine Gain Mode. Coarse Gain sent over ALC pins:
5:reserved
6:reserved
7:reserved:
2.14.299 Register 636h (offset = 636h) [reset = 0h]
Figure 2-2182. Register 636h
7 6 5 4 3 2 1 0
FB_ALC_USE_
LSB_PLUS_ON
E_BIT_FOR_C
ONTROL
FB_ALC_USE_
LSB_BIT_FOR
_CONTROL
R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2196. Register 636 Field Descriptions
Bit Field Type Reset Description
1-1
FB_ALC_USE_LS
B_PLUS_ONE_BIT
_FOR_CONTROL
R/W 0h
Enables the penultimate LSB bit to be used for control
information, so that Peak detector output can be sent on it. the
LSB position is dependent on 12bit or 16bit mode of operation
accordingly. Penultimate LSB of I contains detector selected
by rx_agc_pin_3_select_bits. Penultimate LSB of Q contains
detector selected by rx_agc_pin_4_select_bits
0 : Disable
1 : Enable
0-0
FB_ALC_USE_LS
B_BIT_FOR_CON
TROL
R/W 0h
Enables the LSB bit to be used for control information, so that
Peak detector output can be sent on it. The LSB position is
dependent on 12bit or 16bit mode of operation accordingly.
LSB of I contains detector selected by
rx_agc_pin_1_select_bits. LSB of Q contains detector
selected by rx_agc_pin_2_select_bits
0 : Disable
1 : Enable
2.14.300 Register 637h (offset = 637h) [reset = 0h]
Figure 2-2183. Register 637h
7 6 5 4 3 2 1 0
FB_ALC_USE_
12BIT_SEL
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
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