Texas Instruments AFE79 Series - 2.5.136 Register C8 h (offset = C8 h) [reset = 0 h]; 2.5.137 Register C9 h (offset = C9 h) [reset = 0 h]

ADC JESD Register Map www.ti.com
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SBAU337–May 2020
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Serial Interface Register Maps
Table 2-636. Register C1 Field Descriptions
Bit Field Type Reset Description
7-4 0 R/W 0h Must read or write 0
3-2
LINK2_SYNC_FIF
O_S2_TO_S1_OF
FSET
R/W 0h To modify s=2 to s=1 transfer sync fifo offset of STX3,4/7,8
1-0
LINK2_SYNC_FIF
O_S1_TO_S2_OF
FSET
R/W 2h To modify s=1 to s=2 transfer sync fifo offset of STX3,4/7,8
2.5.136 Register C8h (offset = C8h) [reset = 0h]
Figure 2-632. Register C8h
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 SYNC_HEADE
R_FLIP
R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-637. Register C8 Field Descriptions
Bit Field Type Reset Description
7-1 0 R/W 0h Must read or write 0
0-0
SYNC_HEADER_F
LIP
R/W 0h
Relevant for JESD C
When 1, the final sync header transmitted on the link is flipped
2.5.137 Register C9h (offset = C9h) [reset = 0h]
Figure 2-633. Register C9h
7 6 5 4 3 2 1 0
0 0 0 0 JESDC_ENCO
DING_80B_66
BZ
JESDC_CRC_
MODE
JESDC_ENCODING_MODE
R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-638. Register C9 Field Descriptions
Bit Field Type Reset Description
7-4 0 R/W 0h Must read or write 0
3-3
JESDC_ENCODIN
G_80B_66BZ
R/W 0h
For JESD-C
0 - 64/66 encoding
1 - 64/80 encoding with fill bits using PRBS17
0 : 64/66 encoding
1 : 64/80 encoding with fill bits
2-2
JESDC_CRC_MO
DE
R/W 0h
For JESD-C
0 - CRC12
1 - CRC3
0 : CRC12
1 : CRC3
1-0
JESDC_ENCODIN
G_MODE
R/W 0h
For JESD-C
00 - CRC
01 - FEC
10 - CMD
11 - Invalid
0 : CRC
1 : FEC
2 : CMD