Texas Instruments AFE79 Series - 2.5.1 Register 20 h (offset = 20 h) [reset = 0 h]; 2.5.2 Register 21 h (offset = 21 h) [reset = 1 h]; 2.5.3 Register 22 h (offset = 22 h) [reset = 1 h]

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SBAU337–May 2020
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Serial Interface Register Maps
2.5.1 Register 20h (offset = 20h) [reset = 0h]
Figure 2-497. Register 20h
7 6 5 4 3 2 1 0
0 0 0 0 0 0 JESD_STD_SEL
R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-502. Register 20 Field Descriptions
Bit Field Type Reset Description
7-2 0 R/W 0h Must read or write 0
1-0 JESD_STD_SEL R/W 0h
To select between different JESD supported standards
00 -> JESD-B
10 --> JESD-C
11 --> Invalid
2.5.2 Register 21h (offset = 21h) [reset = 1h]
Figure 2-498. Register 21h
7 6 5 4 3 2 1 0
0 0 0 0 JESD_SYSTEM_MODE
R/W-0h R/W-0h R/W-0h R/W-0h R/W-1h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-503. Register 21 Field Descriptions
Bit Field Type Reset Description
7-4 0 R/W 0h Must read or write 0
3-0
JESD_SYSTEM_M
ODE
R/W 1h
FDD_2R1F_MODE = 0;
FDD_1R1F_MODE (OR) TDD_DEDICATED_MODE = 1;
IDENTICAL_2RX_MODE = 2;
IDENTICAL_1RX_MODE =3;
IDENTICAL_FB_MODE = 4;
TDD_1R1F_SHARED_MODE = 5;
TDD_1R1F_SHARED_MODE_2L_V1 = 6;
TDD_2R1F_SHARED_MODE = 7;
TDD_1R1F_SHARED_MODE_2L_V2 = 8;
For further details, one can refer to the configuration
guide(SBAA417).
2.5.3 Register 22h (offset = 22h) [reset = 1h]
Figure 2-499. Register 22h
7 6 5 4 3 2 1 0
0 0 0 0 0 SYSREF_JESD_MODE
R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R/W-1h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset