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Texas Instruments AFE79 Series - 2.4.109 Register 8 Ch (offset = 8 Ch) [reset = 0 h]; 2.4.110 Register 8 Dh (offset = 8 Dh) [reset = 0 h]; 2.4.111 Register 8 Eh (offset = 8 Eh) [reset = 0 h]; 2.4.112 Register 8 Fh (offset = 8 Fh) [reset = 0 h]

Texas Instruments AFE79 Series
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DAC JESD Register Map
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302
SBAU337May 2020
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Copyright © 2020, Texas Instruments Incorporated
Serial Interface Register Maps
2.4.109 Register 8Ch (offset = 8Ch) [reset = 0h]
Figure 2-338. Register 8Ch
7 6 5 4 3 2 1 0
LANE2_F_COUNTER_ANY_LANE_READY[7:0]
R-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-342. Register 8C Field Descriptions
Bit Field Type Reset Description
7-0
LANE2_F_COUNT
ER_ANY_LANE_R
EADY[7:0]
R 0h
JESDB: Measured rbd_counter value when lane2/6 is ready
JESDC: Measured rbd_counter value when lane2/6 is ready
2.4.110 Register 8Dh (offset = 8Dh) [reset = 0h]
Figure 2-339. Register 8Dh
7 6 5 4 3 2 1 0
LANE2_F_COUNTER_ANY_LANE_READY[15:8]
R-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-343. Register 8D Field Descriptions
Bit Field Type Reset Description
7-0
LANE2_F_COUNT
ER_ANY_LANE_R
EADY[15:8]
R 0h
JESDB: Measured rbd_counter value when lane2/6 is ready
JESDC: Measured rbd_counter value when lane2/6 is ready
2.4.111 Register 8Eh (offset = 8Eh) [reset = 0h]
Figure 2-340. Register 8Eh
7 6 5 4 3 2 1 0
LANE3_F_COUNTER_ANY_LANE_READY[7:0]
R-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-344. Register 8E Field Descriptions
Bit Field Type Reset Description
7-0
LANE3_F_COUNT
ER_ANY_LANE_R
EADY[7:0]
R 0h
JESDB: Measured rbd_counter value when lane3/7 is ready
JESDC: Measured rbd_counter value when lane3/7 is ready
2.4.112 Register 8Fh (offset = 8Fh) [reset = 0h]
Figure 2-341. Register 8Fh
7 6 5 4 3 2 1 0
LANE3_F_COUNTER_ANY_LANE_READY[15:8]
R-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset

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