JESD_SUBCHIP Register Map
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SBAU337–May 2020
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Serial Interface Register Maps
Table 2-208. Register 189 Field Descriptions
Bit Field Type Reset Description
7-0
DBG_RX_READ_O
UT_REG1[15:8]
R 0h
Data from first 4R mux output i.e.
mux_sel_rxa_b1_i_for_2r1f_ab, is sent to this status register,
to check for data toggling.
dbg_rx_read_out_reg1 and dbg_rx_read_out_reg2 has two
consecutive samples
2.3.165 Register 18Ah (offset = 18Ah) [reset = 0h]
Figure 2-206. Register 18Ah
7 6 5 4 3 2 1 0
DBG_RX_READ_OUT_REG2[7:0]
R-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-209. Register 18A Field Descriptions
Bit Field Type Reset Description
7-0
DBG_RX_READ_O
UT_REG2[7:0]
R 0h
Data from first 4R mux output i.e.
mux_sel_rxa_b1_i_for_2r1f_ab, is sent to this status register,
to check for data toggling.
dbg_rx_read_out_reg1 and dbg_rx_read_out_reg2 has two
consecutive samples
2.3.166 Register 18Bh (offset = 18Bh) [reset = 0h]
Figure 2-207. Register 18Bh
7 6 5 4 3 2 1 0
DBG_RX_READ_OUT_REG2[15:8]
R-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-210. Register 18B Field Descriptions
Bit Field Type Reset Description
7-0
DBG_RX_READ_O
UT_REG2[15:8]
R 0h
Data from first 4R mux output i.e.
mux_sel_rxa_b1_i_for_2r1f_ab, is sent to this status register,
to check for data toggling.
dbg_rx_read_out_reg1 and dbg_rx_read_out_reg2 has two
consecutive samples
2.3.167 Register 18Ch (offset = 18Ch) [reset = 0h]
Figure 2-208. Register 18Ch
7 6 5 4 3 2 1 0
DBG_FB_READ_OUT_REG1[7:0]
R-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset