www.ti.com
IO Wrap Register Map
1163
SBAU337–May 2020
Submit Documentation Feedback
Copyright © 2020, Texas Instruments Incorporated
Serial Interface Register Maps
2.16.497 Register 904h (offset = 904h) [reset = 0h]
Figure 2-2760. Register 904h
7 6 5 4 3 2 1 0
SEL_INTPI_GLOBAL_PDN POL_INTPI_GL
OBAL_PDN
R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2776. Register 904 Field Descriptions
Bit Field Type Reset Description
2-1
SEL_INTPI_GLOB
AL_PDN
R/W 0h
select control for intpi_global_pdn. 0 indicates take from
parallel GPIO 1 indicates take from Serial LVDS GPIO 2
indicates take from Serdes GPIO
0-0
POL_INTPI_GLOB
AL_PDN
R/W 0h
polarity control for intpi_global_pdn. 0 indicates pass through
from GPIO when selected 1 indicates inverted signal
2.16.498 Register 905h (offset = 905h) [reset = 2h]
Figure 2-2761. Register 905h
7 6 5 4 3 2 1 0
OVR_SEL_INT
PI_GLOBAL_P
DN
OVR_INTPI_G
LOBAL_PDN
R/W-1h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2777. Register 905 Field Descriptions
Bit Field Type Reset Description
1-1
OVR_SEL_INTPI_
GLOBAL_PDN
R/W 1h
control to select whether the input function intpi_global_pdn
needs to be overriden ot not. 1 indicates override.
0-0
OVR_INTPI_GLOB
AL_PDN
R/W 0h override value for ovr_sel_intpi_global_pdn is made high
2.16.499 Register 908h (offset = 908h) [reset = 0h]
Figure 2-2762. Register 908h
7 6 5 4 3 2 1 0
SEL_INTPI_TX_FB_LOOP_0 POL_INTPI_TX
_FB_LOOP_0
R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2778. Register 908 Field Descriptions
Bit Field Type Reset Description
2-1
SEL_INTPI_TX_FB
_LOOP_0
R/W 0h
select control for intpi_tx_fb_loop_0. 0 indicates take from
parallel GPIO 1 indicates take from Serial LVDS GPIO 2
indicates take from Serdes GPIO
0-0
POL_INTPI_TX_FB
_LOOP_0
R/W 0h
polarity control for intpi_tx_fb_loop_0. 0 indicates pass
through from GPIO when selected 1 indicates inverted signal