Texas Instruments AFE79 Series - 2.14.301 Register 638 h (offset = 638 h) [reset = 20 h]; 2.14.302 Register 639 h (offset = 639 h) [reset = 0 h]; 2.14.303 Register 63 Ah (offset = 63 Ah) [reset = 0 h]

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Serial Interface Register Maps
Table 2-2197. Register 637 Field Descriptions
Bit Field Type Reset Description
0-0
FB_ALC_USE_12B
IT_SEL
R/W 0h
Selects 12 bit or 16 bit output in ALC bypass mode. This
should match with corresponding JESD configuration for 12/16
selection.
Reserved in ALC enabled mode.
0 : 16bit
1 : 12bit
2.14.301 Register 638h (offset = 638h) [reset = 20h]
Figure 2-2184. Register 638h
7 6 5 4 3 2 1 0
FB_ALC_TOTAL_GAIN_RANGE
R/W-20h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2198. Register 638 Field Descriptions
Bit Field Type Reset Description
6-0
FB_ALC_TOTAL_
GAIN_RANGE
R/W 20h
Total Gain Range to be supported by DGC. Total Gain
Compensation is saturated to this value. Allowable range is 0
to 66 dB, in steps of 1 dB.
2.14.302 Register 639h (offset = 639h) [reset = 0h]
Figure 2-2185. Register 639h
7 6 5 4 3 2 1 0
FB_ALC_SIG_BACKOFF_DB
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2199. Register 639 Field Descriptions
Bit Field Type Reset Description
4-0
FB_ALC_SIG_BAC
KOFF_DB
R/W 0h
dB setting. Used in coarse/fine mode (both pin and LSB) only
when coarse/fine range is lower than required total gain range.
This should be in sync with FineExpOffset.
2.14.303 Register 63Ah (offset = 63Ah) [reset = 0h]
Figure 2-2186. Register 63Ah
7 6 5 4 3 2 1 0
FB_ALC_GAIN_OFFSET_INPUT_ALC
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2200. Register 63A Field Descriptions
Bit Field Type Reset Description
2-0
FB_ALC_GAIN_OF
FSET_INPUT_ALC
R/W 0h
Offset to be added to gain compensation if required. Can be
used for optimization. Units is dB