TX Top Register Map
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SBAU337–May 2020
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Serial Interface Register Maps
2.12.131 Register 538h (offset = 538h) [reset = 0h]
Figure 2-1334. Register 538h
7 6 5 4 3 2 1 0
TX_PAP_CHAIN_DELAY_RAMP_DOWN[7:0]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1346. Register 538 Field Descriptions
Bit Field Type Reset Description
7-0
TX_PAP_CHAIN_D
ELAY_RAMP_DO
WN[7:0]
R/W 0h
Tx Chain latency before ramp down starts from PAP trigger to
the PAP state machine. The latency is measured in terms of
clock frequency of FDAC/16.
2.12.132 Register 539h (offset = 539h) [reset = 0h]
Figure 2-1335. Register 539h
7 6 5 4 3 2 1 0
TX_PAP_CHAIN_DELAY_RAMP_DOWN[11:8]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1347. Register 539 Field Descriptions
Bit Field Type Reset Description
3-0
TX_PAP_CHAIN_D
ELAY_RAMP_DO
WN[11:8]
R/W 0h
Tx Chain latency before ramp down starts from PAP trigger to
the PAP state machine. The latency is measured in terms of
clock frequency of FDAC/16.
2.12.133 Register 53Ah (offset = 53Ah) [reset = 0h]
Figure 2-1336. Register 53Ah
7 6 5 4 3 2 1 0
TX_PAP_CHAIN_DELAY_RAMP_UP[7:0]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1348. Register 53A Field Descriptions
Bit Field Type Reset Description
7-0
TX_PAP_CHAIN_D
ELAY_RAMP_UP[7
:0]
R/W 0h
Tx chain latency before ramp up starts after no PAP triggers
are detected and after wait is done in PAP state machine. The
latency is measured in terms of clock frequency of FDAC/16.
2.12.134 Register 53Bh (offset = 53Bh) [reset = 0h]
Figure 2-1337. Register 53Bh
7 6 5 4 3 2 1 0
TX_PAP_CHAIN_DELAY_RAMP_UP[11:8]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
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