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JESD_SUBCHIP Register Map
213
SBAU337–May 2020
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Serial Interface Register Maps
2.3.101 Register AFh (offset = AFh) [reset = EFh]
Figure 2-142. Register AFh
7 6 5 4 3 2 1 0
TX_CLK_LFSR_SEED_VAL[23:16]
R/W-EFh
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-145. Register AF Field Descriptions
Bit Field Type Reset Description
7-0
TX_CLK_LFSR_SE
ED_VAL[23:16]
R/W EFh
lfsr seed value. Need to be used along with
'tx_clk_lfsr_seed_load' register
2.3.102 Register B0h (offset = B0h) [reset = 0h]
Figure 2-143. Register B0h
7 6 5 4 3 2 1 0
IQ_SWAP_RX
D_P23
IQ_SWAP_RX
D_P01
IQ_SWAP_RX
C_P23
IQ_SWAP_RX
C_P01
IQ_SWAP_RX
B_P23
IQ_SWAP_RX
B_P01
IQ_SWAP_RX
A_P23
IQ_SWAP_RX
A_P01
R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-146. Register B0 Field Descriptions
Bit Field Type Reset Description
7-7
IQ_SWAP_RXD_P
23
R/W 0h
When 1, swap data on pins p2 and p3
Used for IQ swap
0 : No swap
1 : swap
6-6
IQ_SWAP_RXD_P
01
R/W 0h
When 1, swap data on pins p0 and p1
Used for IQ swap
0 : No swap
1 : swap
5-5
IQ_SWAP_RXC_P
23
R/W 0h
When 1, swap data on pins p2 and p3
Used for IQ swap
0 : No swap
1 : swap
4-4
IQ_SWAP_RXC_P
01
R/W 0h
When 1, swap data on pins p0 and p1
Used for IQ swap
0 : No swap
1 : swap
3-3
IQ_SWAP_RXB_P
23
R/W 0h
When 1, swap data on pins p2 and p3
Used for IQ swap
0 : No swap
1 : swap
2-2
IQ_SWAP_RXB_P
01
R/W 0h
When 1, swap data on pins p0 and p1
Used for IQ swap
0 : No swap
1 : swap
1-1
IQ_SWAP_RXA_P
23
R/W 0h
When 1, swap data on pins p2 and p3
Used for IQ swap
0 : No swap
1 : swap
0-0
IQ_SWAP_RXA_P
01
R/W 0h
When 1, swap data on pins p0 and p1
Used for IQ swap
0 : No swap
1 : swap