Texas Instruments AFE79 Series - 2.6.94 Register 41 F0 h (offset = 41 F0 h) [reset = 50 h]; 2.6.95 Register 41 F6 h (offset = 41 F6 h) [reset = C4 h]; 2.6.96 Register 41 F7 h (offset = 41 F7 h) [reset = 6 Ch]

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SBAU337–May 2020
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Serial Interface Register Maps
2.6.94 Register 41F0h (offset = 41F0h) [reset = 50h]
Figure 2-808. Register 41F0h
7 6 5 4 3 2 1 0
RX_CTLE_BIAS0
R/W-5h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-814. Register 41F0 Field Descriptions
Bit Field Type Reset Description
6-4 RX_CTLE_BIAS0 R/W 5h RX CTLE bias setting 0.
2.6.95 Register 41F6h (offset = 41F6h) [reset = C4h]
Figure 2-809. Register 41F6h
7 6 5 4 3 2 1 0
RX_CLOCKING_BIAS[4:0] PU_RX_ADC_L
ANE
R/W-18h R/W-1h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-815. Register 41F6 Field Descriptions
Bit Field Type Reset Description
7-3
RX_CLOCKING_BI
AS[4:0]
R/W 18h RX clocking bias.
2-2
PU_RX_ADC_LAN
E
R/W 1h
Power up RX ADC by lane.
0h: Power down
1h: Power up
2.6.96 Register 41F7h (offset = 41F7h) [reset = 6Ch]
Figure 2-810. Register 41F7h
7 6 5 4 3 2 1 0
VREF1P3VCODIV VREFVCODIV RX_CLOCKING_BIAS[6:5]
R/W-3h R/W-3h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-816. Register 41F7 Field Descriptions
Bit Field Type Reset Description
7-5 VREF1P3VCODIV R/W 3h
4-2 VREFVCODIV R/W 3h
1-0
RX_CLOCKING_BI
AS[6:5]
R/W 0h RX clocking bias.