JESD_SUBCHIP Register Map
www.ti.com
250
SBAU337–May 2020
Submit Documentation Feedback
Copyright © 2020, Texas Instruments Incorporated
Serial Interface Register Maps
Table 2-214. Register 18F Field Descriptions
Bit Field Type Reset Description
7-0
DBG_FB_READ_O
UT_REG2[15:8]
R 0h
Data from first 2F mux output i.e.
mux_sel_fbab_i0_for_2r1f_ab, is sent to this status register, to
check for data toggling.
dbg_fb_read_out_reg1 and dbg_fb_read_out_reg2 has two
consecutive samples
2.3.171 Register 190h (offset = 190h) [reset = 0h]
Figure 2-212. Register 190h
7 6 5 4 3 2 1 0
DBG_TX_READ_OUT_REG1[7:0]
R-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-215. Register 190 Field Descriptions
Bit Field Type Reset Description
7-0
DBG_TX_READ_O
UT_REG1[7:0]
R 0h
Data from first 4T mux output, is sent to this status register, to
check for data toggling.
dbg_tx_read_out_reg1 and dbg_tx_read_out_reg2 has two
consecutive samples
2.3.172 Register 191h (offset = 191h) [reset = 0h]
Figure 2-213. Register 191h
7 6 5 4 3 2 1 0
DBG_TX_READ_OUT_REG1[15:8]
R-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-216. Register 191 Field Descriptions
Bit Field Type Reset Description
7-0
DBG_TX_READ_O
UT_REG1[15:8]
R 0h
Data from first 4T mux output, is sent to this status register, to
check for data toggling.
dbg_tx_read_out_reg1 and dbg_tx_read_out_reg2 has two
consecutive samples
2.3.173 Register 192h (offset = 192h) [reset = 0h]
Figure 2-214. Register 192h
7 6 5 4 3 2 1 0
DBG_TX_READ_OUT_REG2[7:0]
R-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-217. Register 192 Field Descriptions
Bit Field Type Reset Description
7-0
DBG_TX_READ_O
UT_REG2[7:0]
R 0h
Data from first 4T mux output, is sent to this status register, to
check for data toggling.
dbg_tx_read_out_reg1 and dbg_tx_read_out_reg2 has two
consecutive samples
To Next Page
Loading...
Need help?
General
