Texas Instruments AFE79 Series - 2.3.115 Register C5 h (offset = C5 h) [reset = ABh]; 2.3.116 Register C6 h (offset = C6 h) [reset = CDh]; 2.3.117 Register C7 h (offset = C7 h) [reset = EFh]

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SBAU337–May 2020
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Serial Interface Register Maps
Table 2-158. Register C4 Field Descriptions (continued)
Bit Field Type Reset Description
1-1
APB_CLK_LFSR_
CODE_OVR_VAL
R/W 0h TESTMODE
0-0
APB_CLK_FROM_
MCU_CLK_EN
R/W 0h
Selects apb_clk from firmware clk divider instead of apb_clk
from GPIO pin.
0 : GPIO clk
1 : From Firmware clk
2.3.115 Register C5h (offset = C5h) [reset = ABh]
Figure 2-156. Register C5h
7 6 5 4 3 2 1 0
APB_CLK_LFSR_SEED_VAL[7:0]
R/W-ABh
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-159. Register C5 Field Descriptions
Bit Field Type Reset Description
7-0
APB_CLK_LFSR_
SEED_VAL[7:0]
R/W ABh
LFSR load. Need to be used along with 'apb_clk_lfsr_load'
register
2.3.116 Register C6h (offset = C6h) [reset = CDh]
Figure 2-157. Register C6h
7 6 5 4 3 2 1 0
APB_CLK_LFSR_SEED_VAL[15:8]
R/W-CDh
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-160. Register C6 Field Descriptions
Bit Field Type Reset Description
7-0
APB_CLK_LFSR_
SEED_VAL[15:8]
R/W CDh
LFSR load. Need to be used along with 'apb_clk_lfsr_load'
register
2.3.117 Register C7h (offset = C7h) [reset = EFh]
Figure 2-158. Register C7h
7 6 5 4 3 2 1 0
APB_CLK_LFSR_SEED_VAL[23:16]
R/W-EFh
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-161. Register C7 Field Descriptions
Bit Field Type Reset Description
7-0
APB_CLK_LFSR_
SEED_VAL[23:16]
R/W EFh
LFSR load. Need to be used along with 'apb_clk_lfsr_load'
register