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FB Top Register Map
941
SBAU337–May 2020
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Serial Interface Register Maps
2.14.271 Register 576h (offset = 576h) [reset = 0h]
Figure 2-2154. Register 576h
7 6 5 4 3 2 1 0
FB_AGC_BAND0_LNA_PHASE29[7:0]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2168. Register 576 Field Descriptions
Bit Field Type Reset Description
7-0
FB_AGC_BAND0_
LNA_PHASE29[7:0
]
R/W 0h
LNA Phase for Band0 for temp index 29 in case of External
LNA Control , Phase for DVGA Index 29 in case of External
DVGA control
2.14.272 Register 577h (offset = 577h) [reset = 0h]
Figure 2-2155. Register 577h
7 6 5 4 3 2 1 0
FB_AGC_BAND0_LNA_PHASE2
9[9:8]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2169. Register 577 Field Descriptions
Bit Field Type Reset Description
1-0
FB_AGC_BAND0_
LNA_PHASE29[9:8
]
R/W 0h
LNA Phase for Band0 for temp index 29 in case of External
LNA Control , Phase for DVGA Index 29 in case of External
DVGA control
2.14.273 Register 578h (offset = 578h) [reset = 0h]
Figure 2-2156. Register 578h
7 6 5 4 3 2 1 0
FB_AGC_BAND0_LNA_PHASE30[7:0]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2170. Register 578 Field Descriptions
Bit Field Type Reset Description
7-0
FB_AGC_BAND0_
LNA_PHASE30[7:0
]
R/W 0h
LNA Phase for Band0 for temp index 30 in case of External
LNA Control , Phase for DVGA Index 30 in case of External
DVGA control
2.14.274 Register 579h (offset = 579h) [reset = 0h]
Figure 2-2157. Register 579h
7 6 5 4 3 2 1 0
FB_AGC_BAND0_LNA_PHASE3
0[9:8]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset