RX Top Register Map
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SBAU337–May 2020
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Serial Interface Register Maps
2.13.141 Register 49Ch (offset = 49Ch) [reset = 0h]
Figure 2-1553. Register 49Ch
7 6 5 4 3 2 1 0
RX_AGC_DEF_ATTN
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1566. Register 49C Field Descriptions
Bit Field Type Reset Description
5-0
RX_AGC_DEF_AT
TN
R/W 0h
Default DSA attn. value when "rx_agc_internal_en" is 0 and
hence it will be starting value when the AGC is enabled
2.13.142 Register 49Dh (offset = 49Dh) [reset = 0h]
Figure 2-1554. Register 49Dh
7 6 5 4 3 2 1 0
RX_AGC_DEF
_LNA_BYP_VA
L_B0
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1567. Register 49D Field Descriptions
Bit Field Type Reset Description
0-0
RX_AGC_DEF_LN
A_BYP_VAL_B0
R/W 0h
Default LNA bypass value for Band 0
0 : LNA enabled
1 : LNA bypassed
2.13.143 Register 49Eh (offset = 49Eh) [reset = 0h]
Figure 2-1555. Register 49Eh
7 6 5 4 3 2 1 0
RX_AGC_DEF
_LNA_BYP_VA
L_B1
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1568. Register 49E Field Descriptions
Bit Field Type Reset Description
0-0
RX_AGC_DEF_LN
A_BYP_VAL_B1
R/W 0h
Default LNA bypass value for Band1. Applicable only if
rx_agc_dualband_en is made high
0 : LNA enabled
1 : LNA bypassed