IO Wrap Register Map
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1142
SBAU337–May 2020
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Serial Interface Register Maps
2.16.434 Register 841h (offset = 841h) [reset = 2h]
Figure 2-2697. Register 841h
7 6 5 4 3 2 1 0
OVR_SEL_INT
PI_RXCD_DSA
_GAIN_2
OVR_INTPI_R
XCD_DSA_GAI
N_2
R/W-1h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2713. Register 841 Field Descriptions
Bit Field Type Reset Description
1-1
OVR_SEL_INTPI_
RXCD_DSA_GAIN
_2
R/W 1h
control to select whether the input function
intpi_rxcd_dsa_gain_2 needs to be overriden ot not. 1
indicates override.
0-0
OVR_INTPI_RXCD
_DSA_GAIN_2
R/W 0h override value for ovr_sel_intpi_rxcd_dsa_gain_2 is made high
2.16.435 Register 844h (offset = 844h) [reset = 0h]
Figure 2-2698. Register 844h
7 6 5 4 3 2 1 0
SEL_INTPI_RXCD_DSA_GAIN_
3
POL_INTPI_RX
CD_DSA_GAIN
_3
R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2714. Register 844 Field Descriptions
Bit Field Type Reset Description
2-1
SEL_INTPI_RXCD
_DSA_GAIN_3
R/W 0h
select control for intpi_rxcd_dsa_gain_3. 0 indicates take from
parallel GPIO 1 indicates take from Serial LVDS GPIO 2
indicates take from Serdes GPIO
0-0
POL_INTPI_RXCD
_DSA_GAIN_3
R/W 0h
polarity control for intpi_rxcd_dsa_gain_3. 0 indicates pass
through from GPIO when selected 1 indicates inverted signal
2.16.436 Register 845h (offset = 845h) [reset = 2h]
Figure 2-2699. Register 845h
7 6 5 4 3 2 1 0
OVR_SEL_INT
PI_RXCD_DSA
_GAIN_3
OVR_INTPI_R
XCD_DSA_GAI
N_3
R/W-1h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2715. Register 845 Field Descriptions
Bit Field Type Reset Description
1-1
OVR_SEL_INTPI_
RXCD_DSA_GAIN
_3
R/W 1h
control to select whether the input function
intpi_rxcd_dsa_gain_3 needs to be overriden ot not. 1
indicates override.
0-0
OVR_INTPI_RXCD
_DSA_GAIN_3
R/W 0h override value for ovr_sel_intpi_rxcd_dsa_gain_3 is made high
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