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IO Wrap Register Map
1147
SBAU337–May 2020
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Serial Interface Register Maps
2.16.449 Register 860h (offset = 860h) [reset = 0h]
Figure 2-2712. Register 860h
7 6 5 4 3 2 1 0
SEL_INTPI_RXA_DSA_GAIN_2 POL_INTPI_RX
A_DSA_GAIN_
2
R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2728. Register 860 Field Descriptions
Bit Field Type Reset Description
2-1
SEL_INTPI_RXA_
DSA_GAIN_2
R/W 0h
select control for intpi_rxa_dsa_gain_2. 0 indicates take from
parallel GPIO 1 indicates take from Serial LVDS GPIO 2
indicates take from Serdes GPIO
0-0
POL_INTPI_RXA_
DSA_GAIN_2
R/W 0h
polarity control for intpi_rxa_dsa_gain_2. 0 indicates pass
through from GPIO when selected 1 indicates inverted signal
2.16.450 Register 861h (offset = 861h) [reset = 2h]
Figure 2-2713. Register 861h
7 6 5 4 3 2 1 0
OVR_SEL_INT
PI_RXA_DSA_
GAIN_2
OVR_INTPI_R
XA_DSA_GAIN
_2
R/W-1h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2729. Register 861 Field Descriptions
Bit Field Type Reset Description
1-1
OVR_SEL_INTPI_
RXA_DSA_GAIN_2
R/W 1h
control to select whether the input function
intpi_rxa_dsa_gain_2 needs to be overriden ot not. 1 indicates
override.
0-0
OVR_INTPI_RXA_
DSA_GAIN_2
R/W 0h override value for ovr_sel_intpi_rxa_dsa_gain_2 is made high
2.16.451 Register 864h (offset = 864h) [reset = 0h]
Figure 2-2714. Register 864h
7 6 5 4 3 2 1 0
SEL_INTPI_RXB_DSA_GAIN_0 POL_INTPI_RX
B_DSA_GAIN_
0
R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2730. Register 864 Field Descriptions
Bit Field Type Reset Description
2-1
SEL_INTPI_RXB_
DSA_GAIN_0
R/W 0h
select control for intpi_rxb_dsa_gain_0. 0 indicates take from
parallel GPIO 1 indicates take from Serial LVDS GPIO 2
indicates take from Serdes GPIO
0-0
POL_INTPI_RXB_
DSA_GAIN_0
R/W 0h
polarity control for intpi_rxb_dsa_gain_0. 0 indicates pass
through from GPIO when selected 1 indicates inverted signal