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SERDES Register Map
473
SBAU337–May 2020
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Serial Interface Register Maps
2.6.20 Register 401Ah (offset = 401Ah) [reset = 0h]
Figure 2-734. Register 401Ah
7 6 5 4 3 2 1 0
LF_CNTR_TARGET_LSB[7:0]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-740. Register 401A Field Descriptions
Bit Field Type Reset Description
7-0
LF_CNTR_TARGE
T_LSB[7:0]
R/W 0h Low frequency component counter, LSB
2.6.21 Register 401Bh (offset = 401Bh) [reset = 2h]
Figure 2-735. Register 401Bh
7 6 5 4 3 2 1 0
LF_CNTR_TARGET_LSB[15:8]
R/W-2h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-741. Register 401B Field Descriptions
Bit Field Type Reset Description
7-0
LF_CNTR_TARGE
T_LSB[15:8]
R/W 2h Low frequency component counter, LSB
2.6.22 Register 401Ch (offset = 401Ch) [reset = 0h]
Figure 2-736. Register 401Ch
7 6 5 4 3 2 1 0
HF_CNTR_TARGET[7:0]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-742. Register 401C Field Descriptions
Bit Field Type Reset Description
7-0
HF_CNTR_TARGE
T[7:0]
R/W 0h High Frequency Component Counter.
2.6.23 Register 401Dh (offset = 401Dh) [reset = 80h]
Figure 2-737. Register 401Dh
7 6 5 4 3 2 1 0
HF_CNTR_TARGET[15:8]
R/W-80h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset