Texas Instruments AFE79 Series User Manual

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241
SBAU337–May 2020
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Serial Interface Register Maps
2.3.146 Register 166h (offset = 166h) [reset = 0h]
Figure 2-187. Register 166h
7 6 5 4 3 2 1 0
DBG_FBCD_ASYNC_FIFO_ALARM_CLR DBG_FBAB_ASYNC_FIFO_ALARM_CLR
R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-190. Register 166 Field Descriptions
Bit Field Type Reset Description
7-4
DBG_FBCD_ASYN
C_FIFO_ALARM_
CLR
R/W 0h
clear for FBCD to JESD Async-FIFO debug alarm. Only bit0 is
valid.
3-0
DBG_FBAB_ASYN
C_FIFO_ALARM_
CLR
R/W 0h
clear for FBAB to JESD Async-FIFO debug alarm. Only bit0 is
valid.
2.3.147 Register 168h (offset = 168h) [reset = 0h]
Figure 2-188. Register 168h
7 6 5 4 3 2 1 0
DBG_RXB_ASYNC_FIFO_ALARM_MASK DBG_RXA_ASYNC_FIFO_ALARM_MASK
R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-191. Register 168 Field Descriptions
Bit Field Type Reset Description
7-4
DBG_RXB_ASYNC
_FIFO_ALARM_M
ASK
R/W 0h
mask for RXB to JESD Async-FIFO debug alarm. Only bit0 is
valid.
3-0
DBG_RXA_ASYNC
_FIFO_ALARM_M
ASK
R/W 0h
mask for RXA to JESD Async-FIFO debug alarm. Only bit0 is
valid.
2.3.148 Register 169h (offset = 169h) [reset = 0h]
Figure 2-189. Register 169h
7 6 5 4 3 2 1 0
DBG_RXD_ASYNC_FIFO_ALARM_MASK DBG_RXC_ASYNC_FIFO_ALARM_MASK
R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-192. Register 169 Field Descriptions
Bit Field Type Reset Description
7-4
DBG_RXD_ASYN
C_FIFO_ALARM_
MASK
R/W 0h
mask for RXD to JESD Async-FIFO debug alarm. Only bit0 is
valid.
3-0
DBG_RXC_ASYN
C_FIFO_ALARM_
MASK
R/W 0h
mask for RXC to JESD Async-FIFO debug alarm. Only bit0 is
valid.

Texas Instruments AFE79 Series Specifications

General

Brand	Texas Instruments
Model	AFE79 Series
Category	Control Unit
Language	English