Texas Instruments AFE79 Series - 2.5.171 Register FDh (offset = FDh) [reset = 0 h]; 2.5.172 Register FEh (offset = FEh) [reset = 0 h]; 2.5.173 Register FFh (offset = FFh) [reset = 0 h]

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SBAU337–May 2020
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Serial Interface Register Maps
2.5.171 Register FDh (offset = FDh) [reset = 0h]
Figure 2-667. Register FDh
7 6 5 4 3 2 1 0
0 0 0 JESD_INTERNAL_CTR_ON_SYNC_DEASSERT2[12:8]
R/W-0h R/W-0h R/W-0h R-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-672. Register FD Field Descriptions
Bit Field Type Reset Description
7-5 0 R/W 0h Must read or write 0
4-0
JESD_INTERNAL_
CTR_ON_SYNC_D
EASSERT2[12:8]
R 0h multiframe counter value on sync_n deassertion at STX3/7
2.5.172 Register FEh (offset = FEh) [reset = 0h]
Figure 2-668. Register FEh
7 6 5 4 3 2 1 0
JESD_INTERNAL_CTR_ON_SYNC_DEASSERT3[7:0]
R-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-673. Register FE Field Descriptions
Bit Field Type Reset Description
7-0
JESD_INTERNAL_
CTR_ON_SYNC_D
EASSERT3[7:0]
R 0h multiframe counter value on sync_n deassertion at STX4/8
2.5.173 Register FFh (offset = FFh) [reset = 0h]
Figure 2-669. Register FFh
7 6 5 4 3 2 1 0
0 0 0 JESD_INTERNAL_CTR_ON_SYNC_DEASSERT3[12:8]
R/W-0h R/W-0h R/W-0h R-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-674. Register FF Field Descriptions
Bit Field Type Reset Description
7-5 0 R/W 0h Must read or write 0
4-0
JESD_INTERNAL_
CTR_ON_SYNC_D
EASSERT3[12:8]
R 0h multiframe counter value on sync_n deassertion at STX4/8