Texas Instruments AFE79 Series - 2.12.142 Register 54 Ch (offset = 54 Ch) [reset = 0 h]; 2.12.143 Register 54 Dh (offset = 54 Dh) [reset = 0 h]; 2.12.144 Register 54 Eh (offset = 54 Eh) [reset = 1 Bh]

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SBAU337–May 2020
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Serial Interface Register Maps
Table 2-1356. Register 548 Field Descriptions
Bit Field Type Reset Description
0-0
TX_PAP_AMPLITU
DE_MODE_SEL
R/W 0h
Select ramp up/down mode.
0:(1+cos)/2 ramp:
1:linear ramp:
2.12.142 Register 54Ch (offset = 54Ch) [reset = 0h]
Figure 2-1345. Register 54Ch
7 6 5 4 3 2 1 0
TX_PAP_OTHER_TX_PAP_ALARM_CLR[7:0]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1357. Register 54C Field Descriptions
Bit Field Type Reset Description
7-0
TX_PAP_OTHER_
TX_PAP_ALARM_
CLR[7:0]
R/W 0h
Clear PAP TxA input & detection alarms. Value 1 = Clear,
Value 0 = No Clear.
bit [0] :PLL Alarm
bit [5]: JESD Serdes Alarm
bit [6]: Async FIFO Overflow Alarm
bit [7]: Saturation Overflow Alarm
bit [8]: Dual/Single band Alarm
bit [9]: PAP dual band combiner alarm
bit[10]: FW/SPI triggered alarm
Remaining: Unused
2.12.143 Register 54Dh (offset = 54Dh) [reset = 0h]
Figure 2-1346. Register 54Dh
7 6 5 4 3 2 1 0
TX_PAP_OTHER_TX_PAP_ALARM_CLR[10:8]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1358. Register 54D Field Descriptions
Bit Field Type Reset Description
2-0
TX_PAP_OTHER_
TX_PAP_ALARM_
CLR[10:8]
R/W 0h
Clear PAP TxA input & detection alarms. Value 1 = Clear,
Value 0 = No Clear.
bit [0] :PLL Alarm
bit [5]: JESD Serdes Alarm
bit [6]: Async FIFO Overflow Alarm
bit [7]: Saturation Overflow Alarm
bit [8]: Dual/Single band Alarm
bit [9]: PAP dual band combiner alarm
bit[10]: FW/SPI triggered alarm
Remaining: Unused
2.12.144 Register 54Eh (offset = 54Eh) [reset = 1Bh]
Figure 2-1347. Register 54Eh
7 6 5 4 3 2 1 0
TX_PAP_OTHER_TX_PAP_ALARM_MASK[7:0]
R/W-1Bh
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset