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SERDES Register Map
489
SBAU337–May 2020
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Serial Interface Register Maps
2.6.72 Register 40A2h (offset = 40A2h) [reset = 0h]
Figure 2-786. Register 40A2h
7 6 5 4 3 2 1 0
READ_THETA4
R-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-792. Register 40A2 Field Descriptions
Bit Field Type Reset Description
6-0 READ_THETA4 R 0h Timing loop phase 4 readback value.
2.6.73 Register 40A3h (offset = 40A3h) [reset = 0h]
Figure 2-787. Register 40A3h
7 6 5 4 3 2 1 0
READ_THETA3
R-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-793. Register 40A3 Field Descriptions
Bit Field Type Reset Description
6-0 READ_THETA3 R 0h Timing loop phase 3 readback value.
2.6.74 Register 40A4h (offset = 40A4h) [reset = 0h]
Figure 2-788. Register 40A4h
7 6 5 4 3 2 1 0
READ_MRGN_CNTR[7:0]
R-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-794. Register 40A4 Field Descriptions
Bit Field Type Reset Description
7-0
READ_MRGN_CN
TR[7:0]
R 0h
Readout of Margin Counter module's output margin counter to
the state machine.
Margin loop counter readback value.
2.6.75 Register 40A5h (offset = 40A5h) [reset = 0h]
Figure 2-789. Register 40A5h
7 6 5 4 3 2 1 0
READ_MRGN_CNTR[11:8]
R-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset