Texas Instruments AFE79 Series - 2.5.168 Register FAh (offset = FAh) [reset = 0 h]; 2.5.169 Register FBh (offset = FBh) [reset = 0 h]; 2.5.170 Register FCh (offset = FCh) [reset = 0 h]

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SBAU337–May 2020
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Serial Interface Register Maps
Table 2-668. Register F9 Field Descriptions
Bit Field Type Reset Description
7-5 0 R/W 0h Must read or write 0
4-0
JESD_INTERNAL_
CTR_ON_SYNC_D
EASSERT0[12:8]
R 0h multiframe counter value on sync_n deassertion at STX1/5
2.5.168 Register FAh (offset = FAh) [reset = 0h]
Figure 2-664. Register FAh
7 6 5 4 3 2 1 0
JESD_INTERNAL_CTR_ON_SYNC_DEASSERT1[7:0]
R-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-669. Register FA Field Descriptions
Bit Field Type Reset Description
7-0
JESD_INTERNAL_
CTR_ON_SYNC_D
EASSERT1[7:0]
R 0h multiframe counter value on sync_n deassertion at STX2/6
2.5.169 Register FBh (offset = FBh) [reset = 0h]
Figure 2-665. Register FBh
7 6 5 4 3 2 1 0
0 0 0 JESD_INTERNAL_CTR_ON_SYNC_DEASSERT1[12:8]
R/W-0h R/W-0h R/W-0h R-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-670. Register FB Field Descriptions
Bit Field Type Reset Description
7-5 0 R/W 0h Must read or write 0
4-0
JESD_INTERNAL_
CTR_ON_SYNC_D
EASSERT1[12:8]
R 0h multiframe counter value on sync_n deassertion at STX2/6
2.5.170 Register FCh (offset = FCh) [reset = 0h]
Figure 2-666. Register FCh
7 6 5 4 3 2 1 0
JESD_INTERNAL_CTR_ON_SYNC_DEASSERT2[7:0]
R-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-671. Register FC Field Descriptions
Bit Field Type Reset Description
7-0
JESD_INTERNAL_
CTR_ON_SYNC_D
EASSERT2[7:0]
R 0h multiframe counter value on sync_n deassertion at STX3/7