Texas Instruments AFE79 Series - 2.5.74 Register 7 Bh (offset = 7 Bh) [reset = Fh]; 2.5.75 Register 7 Ch (offset = 7 Ch) [reset = 2 Fh]; 2.5.76 Register 7 Dh (offset = 7 Dh) [reset = 20 h]

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Serial Interface Register Maps
Table 2-574. Register 7A Field Descriptions
Bit Field Type Reset Description
7-0 LINK0_ILA_M_M1 R/W 0h
JESD link config for STX1/5
Used only when link0_jesd_ila_config_override is 1.
Else M derived from LMFS is used.
2.5.74 Register 7Bh (offset = 7Bh) [reset = Fh]
Figure 2-570. Register 7Bh
7 6 5 4 3 2 1 0
LINK0_CS 0 LINK0_ILA_N_M1
R/W-0h R/W-0h R/W-Fh
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-575. Register 7B Field Descriptions
Bit Field Type Reset Description
7-6 LINK0_CS R/W 0h JESD link config for STX1/5
5-5 0 R/W 0h Must read or write 0
4-0 LINK0_ILA_N_M1 R/W Fh
JESD link config for STX1/5
Used only when link0_jesd_ila_config_override is 1.
Else N derived from LMFS is used.
2.5.75 Register 7Ch (offset = 7Ch) [reset = 2Fh]
Figure 2-571. Register 7Ch
7 6 5 4 3 2 1 0
LINK0_SUBCLASSV LINK0_ILA_NPRIME_M1
R/W-1h R/W-Fh
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-576. Register 7C Field Descriptions
Bit Field Type Reset Description
7-5
LINK0_SUBCLASS
V
R/W 1h JESD link config for STX1/5
4-0
LINK0_ILA_NPRIM
E_M1
R/W Fh
JESD link config for STX1/5
Used only when link0_jesd_ila_config_override is 1.
Else N prime derived from LMFS is used.
2.5.76 Register 7Dh (offset = 7Dh) [reset = 20h]
Figure 2-572. Register 7Dh
7 6 5 4 3 2 1 0
LINK0_JESDV LINK0_ILA_S_M1
R/W-1h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset