Texas Instruments AFE79 Series User Manual

DAC JESD Register Map www.ti.com
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SBAU337–May 2020
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Serial Interface Register Maps
2.4 DAC JESD Register Map
Table 2-233. DAC JESD Register Map
ADDRESS (Hex) D7 D6 D5 D4 D3 D2 D1 D0
20h
LINK1_INIT_STA
TE
LINK0_INIT_STA
TE
21h SYSREF_MODE
22h LINK0_JESD_SAMPLE_MODE LINK0_JESD_MODE
23h LINK1_JESD_SAMPLE_MODE LINK1_JESD_MODE
24h
SERDESFIFO_I
NIT_STATE_OV
R
GEARBOX_INIT
_STATE_OVR
SERDES_DATA
_FLIP
SPI_TXENABLE
FIFO_ERROR_Z
EROS_DATA_E
NA
ZERO_INVALID
_DATA
ALARM_ZEROS
_JESD_DATA_E
NA
LINK_CONFIG_
ACROSS_2T_IN
STANCES
25h
SERDESFIFO_I
NIT_STATE_LA
NE3_VAL
SERDESFIFO_I
NIT_STATE_LA
NE2_VAL
SERDESFIFO_I
NIT_STATE_LA
NE1_VAL
SERDESFIFO_I
NIT_STATE_LA
NE0_VAL
GEARBOX_INIT
_STATE_LANE3
_VAL
GEARBOX_INIT
_STATE_LANE2
_VAL
GEARBOX_INIT
_STATE_LANE1
_VAL
GEARBOX_INIT
_STATE_LANE0
_VAL
26h
MAPPER_SYNC
_FIFO_EN_OVR
MAPPER_SYNC
_FIFO_DATA_S
WAP_VAL
MAPPER_SYNC
_FIFO_DATA_S
WAP_OVR
PHASE_MODE NUM_LINKS JESD_STD_SEL
27h
MAPPER_SYNC
_FIFO_TX4_2_E
N
MAPPER_SYNC
_FIFO_TX4_1_E
N
MAPPER_SYNC
_FIFO_TX3_2_E
N
MAPPER_SYNC
_FIFO_TX3_1_E
N
MAPPER_SYNC
_FIFO_TX2_2_E
N
MAPPER_SYNC
_FIFO_TX2_1_E
N
MAPPER_SYNC
_FIFO_TX1_2_E
N
MAPPER_SYNC
_FIFO_TX1_1_E
N
28h
MAPPER_SYNC
_FIFO_TX4_MO
DE_OVR
MAPPER_SYNC
_FIFO_TX3_MO
DE_OVR
MAPPER_SYNC
_FIFO_TX2_MO
DE_OVR
MAPPER_SYNC
_FIFO_TX1_MO
DE_OVR
MAPPER_SYNC
_FIFO_TX4_OF
FSET_OVR
MAPPER_SYNC
_FIFO_TX3_OF
FSET_OVR
MAPPER_SYNC
_FIFO_TX2_OF
FSET_OVR
MAPPER_SYNC
_FIFO_TX1_OF
FSET_OVR
29h MAPPER_SYNC_FIFO_TX2_OFFSET_VAL MAPPER_SYNC_FIFO_TX1_OFFSET_VAL
2Ah
MAPPER_SYNC_FIFO_TX4_OFFS
ET_VAL
MAPPER_SYNC_FIFO_TX3_OFFS
ET_VAL
2Bh
MAPPER_SYNC
_FIFO_TX4_MO
DE_VAL
MAPPER_SYNC
_FIFO_TX3_MO
DE_VAL
MAPPER_SYNC_FIFO_TX2_MODE_VAL MAPPER_SYNC_FIFO_TX1_MODE_VAL
2Ch ROOT_CLK_TX1_DIV_M
2Dh ROOT_CLK_TX1_DIV_N_M1
2Eh ROOT_CLK_TX2_DIV_M
2Fh ROOT_CLK_TX2_DIV_N_M1
30h DUC_CLK_TX1_DIV_M
31h DUC_CLK_TX1_DIV_N_M1
32h DUC_CLK_TX2_DIV_M
33h DUC_CLK_TX2_DIV_N_M1
34h JESD_CLK_TX1_DIV_M
35h JESD_CLK_TX1_DIV_N_M1
36h JESD_CLK_TX2_DIV_M
37h JESD_CLK_TX2_DIV_N_M1
38h
CLK_DIV_LFSR
_SEED_LOAD
SPI_SYSREF_O
VERRIDE
SPI_SYSREF
JESD_CLK_DIV
2_DIV_DITHER_
EN
JESD_CLK_DIV
_DITHER_EN
DUC_CLK_DIV_
DITHER_EN
DUC_CLK_IO_D
IV_DITHER_EN
TX_ROOT_CLK
_DIV_DITHER_E
N
39h CLK_DIV_LFSR_SEED_VAL[7:0]
3Ah CLK_DIV_LFSR_SEED_VAL[15:8]
3Bh CLK_DIV_LFSR_SEED_VAL[23:16]
3Ch SERDES_FIFO_OFFSET_LANE1 SERDES_FIFO_OFFSET_LANE0
3Dh SERDES_FIFO_OFFSET_LANE3 SERDES_FIFO_OFFSET_LANE2
3Eh SERDES_FIFO_ERROR_DIFF2_UNMASK
3Fh
SYNC_FIFO_66TO33_OFFSET_LA
NE23
SYNC_FIFO_66TO33_OFFSET_LA
NE01
SYNC_FIFO_33TO66_OFFSET_LA
NE23
SYNC_FIFO_33TO66_OFFSET_LA
NE01
40h
COMMA_ALIGN
_TIMER_EN
COMMA_ALIGN
_REALIGN_MAS
K
LINK1_COMMA_
ALIGN_LOCK_R
ESET_DISABLE
LINK0_COMMA_
ALIGN_LOCK_R
ESET_DISABLE
LINK1_COMMA_
ALIGN_RESET
LINK0_COMMA_
ALIGN_RESET
41h COMMA_ALIGN_BIT_COUNTER_INIT
42h COMMA_ALIGN_VALID_THRESH
43h COMMA_ALIGN_INVALID_THRESH
44h LINK0_DID
45h LINK0_BID LINK0_ADJCNT
46h LINK0_ADJDIR LINK0_PHADJ
47h LINK0_SCR LINK0_ILA_L_M1
48h LINK0_ILA_F_M1

Texas Instruments AFE79 Series Specifications

General

Brand	Texas Instruments
Model	AFE79 Series
Category	Control Unit
Language	English