Texas Instruments AFE79 Series User Manual

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SBAU337–May 2020
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Serial Interface Register Maps
Table 2-233. DAC JESD Register Map (continued)
ADDRESS (Hex) D7 D6 D5 D4 D3 D2 D1 D0
13Ah LINK1_SYNC_RELEASE_RBD_M1[7:0]
13Bh LINK1_SYNC_RELEASE_RBD_M1[15:8]
13Ch LANE0_SKEW
13Dh LANE1_SKEW
13Eh LANE2_SKEW
13Fh LANE3_SKEW
140h CTRL_TX1_ROOT_CLK_P3 CTRL_TX1_ROOT_CLK_P2 CTRL_TX1_ROOT_CLK_P1 CTRL_TX1_ROOT_CLK_P0
141h CTRL_TX2_ROOT_CLK_P3 CTRL_TX2_ROOT_CLK_P2 CTRL_TX2_ROOT_CLK_P1 CTRL_TX2_ROOT_CLK_P0
142h CTRL_TX1_DUC_CLK_P3 CTRL_TX1_DUC_CLK_P2 CTRL_TX1_DUC_CLK_P1 CTRL_TX1_DUC_CLK_P0
143h CTRL_TX2_DUC_CLK_P3 CTRL_TX2_DUC_CLK_P2 CTRL_TX2_DUC_CLK_P1 CTRL_TX2_DUC_CLK_P0
144h CTRL_TX1_JESD_CLK_P3 CTRL_TX1_JESD_CLK_P2 CTRL_TX1_JESD_CLK_P1 CTRL_TX1_JESD_CLK_P0
145h CTRL_TX2_JESD_CLK_P3 CTRL_TX2_JESD_CLK_P2 CTRL_TX2_JESD_CLK_P1 CTRL_TX2_JESD_CLK_P0
146h CTRL_TX1_JESD_CLK_DIV2_P3 CTRL_TX1_JESD_CLK_DIV2_P2 CTRL_TX1_JESD_CLK_DIV2_P1 CTRL_TX1_JESD_CLK_DIV2_P0
147h CTRL_TX2_JESD_CLK_DIV2_P3 CTRL_TX2_JESD_CLK_DIV2_P2 CTRL_TX2_JESD_CLK_DIV2_P1 CTRL_TX2_JESD_CLK_DIV2_P0
148h MAPPER_SYNC_FIFO_TX1_OFFSET_S4TO2 MAPPER_SYNC_FIFO_TX1_OFFSET_S4TO4
149h MAPPER_SYNC_FIFO_TX1_OFFSET_S2TO2 MAPPER_SYNC_FIFO_TX1_OFFSET_S4TO1
14Ah MAPPER_SYNC_FIFO_TX1_OFFSET_S1TO1 MAPPER_SYNC_FIFO_TX1_OFFSET_S2TO1
14Ch MAPPER_SYNC_FIFO_TX2_OFFSET_S4TO2 MAPPER_SYNC_FIFO_TX2_OFFSET_S4TO4
14Dh MAPPER_SYNC_FIFO_TX2_OFFSET_S2TO2 MAPPER_SYNC_FIFO_TX2_OFFSET_S4TO1
14Eh MAPPER_SYNC_FIFO_TX2_OFFSET_S1TO1 MAPPER_SYNC_FIFO_TX2_OFFSET_S2TO1
150h
SERDES_FIFO_
PTR_SAMPLE
151h SERDES_FIFO_RD_PTR_SAMPLE SERDES_FIFO_WR_PTR_SAMPLE
2.4.1 Register 20h (offset = 20h) [reset = 3h]
Figure 2-230. Register 20h
7 6 5 4 3 2 1 0
LINK1_INIT_ST
ATE
LINK0_INIT_ST
ATE
R/W-1h R/W-1h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-234. Register 20 Field Descriptions
Bit Field Type Reset Description
1-1
LINK1_INIT_STAT
E
R/W 1h
Places JESD lanes [2:3]/[6:7] into init state when asserted
0 : Func State
1 : Reset state
0-0
LINK0_INIT_STAT
E
R/W 1h
Places JESD lanes [0:1]/[4:5] into init state when asserted
0 : Func State
1 : Reset state
2.4.2 Register 21h (offset = 21h) [reset = 1h]
Figure 2-231. Register 21h
7 6 5 4 3 2 1 0
SYSREF_MODE
R/W-1h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset

Texas Instruments AFE79 Series Specifications

General

Brand	Texas Instruments
Model	AFE79 Series
Category	Control Unit
Language	English