IO Wrap Register Map
www.ti.com
1134
SBAU337–May 2020
Submit Documentation Feedback
Copyright © 2020, Texas Instruments Incorporated
Serial Interface Register Maps
2.16.410 Register 801h (offset = 801h) [reset = 2h]
Figure 2-2673. Register 801h
7 6 5 4 3 2 1 0
OVR_SEL_INT
PI_SPIB2_CS_
N
OVR_INTPI_S
PIB2_CS_N
R/W-1h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2689. Register 801 Field Descriptions
Bit Field Type Reset Description
1-1
OVR_SEL_INTPI_
SPIB2_CS_N
R/W 1h
control to select whether the input function intpi_spib2_cs_n
needs to be overriden ot not. 1 indicates override.
0-0
OVR_INTPI_SPIB2
_CS_N
R/W 0h override value for ovr_sel_intpi_spib2_cs_n is made high
2.16.411 Register 804h (offset = 804h) [reset = 0h]
Figure 2-2674. Register 804h
7 6 5 4 3 2 1 0
SEL_INTPI_SPIB2_CLK POL_INTPI_SP
IB2_CLK
R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2690. Register 804 Field Descriptions
Bit Field Type Reset Description
2-1
SEL_INTPI_SPIB2
_CLK
R/W 0h
select control for intpi_spib2_clk. 0 indicates take from parallel
GPIO 1 indicates take from Serial LVDS GPIO 2 indicates
take from Serdes GPIO
0-0
POL_INTPI_SPIB2
_CLK
R/W 0h
polarity control for intpi_spib2_clk. 0 indicates pass through
from GPIO when selected 1 indicates inverted signal
2.16.412 Register 805h (offset = 805h) [reset = 2h]
Figure 2-2675. Register 805h
7 6 5 4 3 2 1 0
OVR_SEL_INT
PI_SPIB2_CLK
OVR_INTPI_S
PIB2_CLK
R/W-1h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2691. Register 805 Field Descriptions
Bit Field Type Reset Description
1-1
OVR_SEL_INTPI_
SPIB2_CLK
R/W 1h
control to select whether the input function intpi_spib2_clk
needs to be overriden ot not. 1 indicates override.
0-0
OVR_INTPI_SPIB2
_CLK
R/W 0h override value for ovr_sel_intpi_spib2_clk is made high
To Next Page
Loading...
Need help?
General
