Texas Instruments AFE79 Series - 2.12.35 Register 130 h (offset = 130 h) [reset = 0 h]; 2.12.36 Register 131 h (offset = 131 h) [reset = 0 h]; 2.12.37 Register 142 h (offset = 142 h) [reset = 0 h]

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SBAU337–May 2020
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Serial Interface Register Maps
2.12.35 Register 130h (offset = 130h) [reset = 0h]
Figure 2-1238. Register 130h
7 6 5 4 3 2 1 0
TX_DUC_BAN
D0_MIXER1_N
CO0_FCW_FO
RCE_RELOAD
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1250. Register 130 Field Descriptions
Bit Field Type Reset Description
0-0
TX_DUC_BAND0_
MIXER1_NCO0_F
CW_FORCE_REL
OAD
R/W 0h
A 0-1-0 sequence on this bit can be used to force a re-load of
the FCW in the band0 nco0 in Mixer1. Will break phase
coherence.
2.12.36 Register 131h (offset = 131h) [reset = 0h]
Figure 2-1239. Register 131h
7 6 5 4 3 2 1 0
TX_DUC_BAN
D0_MIXER1_N
CO1_FCW_FO
RCE_RELOAD
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1251. Register 131 Field Descriptions
Bit Field Type Reset Description
0-0
TX_DUC_BAND0_
MIXER1_NCO1_F
CW_FORCE_REL
OAD
R/W 0h
A 0-1-0 sequence on this bit can be used to force a re-load of
the FCW in the band0 nco1 in Mixer1. Will break phase
coherence.
2.12.37 Register 142h (offset = 142h) [reset = 0h]
Figure 2-1240. Register 142h
7 6 5 4 3 2 1 0
TX_DUC_BAN
D0_MIXER1_F
RAC_CORR_E
N
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1252. Register 142 Field Descriptions
Bit Field Type Reset Description
0-0
TX_DUC_BAND0_
MIXER1_FRAC_C
ORR_EN
R/W 0h
Enable fractional FCW mode in the Mixer1 Band0 NCO
0 : Disabled
1 : Enabled