Texas Instruments AFE79 Series - 2.14.219 Register 542 h (offset = 542 h) [reset = 0 h]; 2.14.220 Register 543 h (offset = 543 h) [reset = 0 h]; 2.14.221 Register 544 h (offset = 544 h) [reset = 0 h]

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Serial Interface Register Maps
Table 2-2115. Register 541 Field Descriptions
Bit Field Type Reset Description
1-0
FB_AGC_BAND0_
LNA_PHASE2[9:8]
R/W 0h
LNA Phase for Band0 for temp index 2 in case of External
LNA Control , Phase for DVGA Index 2 in case of External
DVGA control
2.14.219 Register 542h (offset = 542h) [reset = 0h]
Figure 2-2102. Register 542h
7 6 5 4 3 2 1 0
FB_AGC_BAND0_LNA_PHASE3[7:0]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2116. Register 542 Field Descriptions
Bit Field Type Reset Description
7-0
FB_AGC_BAND0_
LNA_PHASE3[7:0]
R/W 0h
LNA Phase for Band0 for temp index 3 in case of External
LNA Control , Phase for DVGA Index 3 in case of External
DVGA control
2.14.220 Register 543h (offset = 543h) [reset = 0h]
Figure 2-2103. Register 543h
7 6 5 4 3 2 1 0
FB_AGC_BAND0_LNA_PHASE3
[9:8]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2117. Register 543 Field Descriptions
Bit Field Type Reset Description
1-0
FB_AGC_BAND0_
LNA_PHASE3[9:8]
R/W 0h
LNA Phase for Band0 for temp index 3 in case of External
LNA Control , Phase for DVGA Index 3 in case of External
DVGA control
2.14.221 Register 544h (offset = 544h) [reset = 0h]
Figure 2-2104. Register 544h
7 6 5 4 3 2 1 0
FB_AGC_BAND0_LNA_PHASE4[7:0]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2118. Register 544 Field Descriptions
Bit Field Type Reset Description
7-0
FB_AGC_BAND0_
LNA_PHASE4[7:0]
R/W 0h
LNA Phase for Band0 for temp index 4 in case of External
LNA Control , Phase for DVGA Index 4 in case of External
DVGA control